retdec
Public Member Functions | Protected Member Functions | Static Protected Attributes | List of all members
retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl Class Reference

#include <powerpc_impl.h>

Inheritance diagram for retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl:
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Collaboration diagram for retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl:
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Public Member Functions

 Capstone2LlvmIrTranslatorPowerpc_impl (llvm::Module *m, cs_mode basic=CS_MODE_32, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
virtual bool isAllowedBasicMode (cs_mode m) override
 
virtual bool isAllowedExtraMode (cs_mode m) override
 
virtual uint32_t getArchByteSize () override
 
- Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >
 Capstone2LlvmIrTranslator_impl (cs_arch a, cs_mode basic, cs_mode extra, llvm::Module *m)
 
virtual ~Capstone2LlvmIrTranslator_impl ()
 
virtual void setIgnoreUnexpectedOperands (bool f) override
 
virtual void setIgnoreUnhandledInstructions (bool f) override
 
virtual void setGeneratePseudoAsmFunctions (bool f) override
 
virtual bool isIgnoreUnexpectedOperands () const override
 
virtual bool isIgnoreUnhandledInstructions () const override
 
virtual bool isGeneratePseudoAsmFunctions () const override
 
virtual void modifyBasicMode (cs_mode m) override
 
virtual void modifyExtraMode (cs_mode m) override
 
virtual uint32_t getArchBitSize () override
 
virtual TranslationResult translate (const uint8_t *bytes, std::size_t size, retdec::common::Address a, llvm::IRBuilder<> &irb, std::size_t count=0, bool stopOnBranch=false) override
 
virtual TranslationResultOne translateOne (const uint8_t *&bytes, std::size_t &size, retdec::common::Address &a, llvm::IRBuilder<> &irb) override
 
virtual const csh & getCapstoneEngine () const override
 
virtual cs_arch getArchitecture () const override
 
virtual cs_mode getBasicMode () const override
 
virtual cs_mode getExtraMode () const override
 
virtual bool hasDelaySlot (uint32_t id) const override
 
virtual bool hasDelaySlotTypical (uint32_t id) const override
 
virtual bool hasDelaySlotLikely (uint32_t id) const override
 
virtual std::size_t getDelaySlot (uint32_t id) const override
 
virtual llvm::GlobalVariable * getRegister (uint32_t r) override
 
virtual std::string getRegisterName (uint32_t r) const override
 
virtual uint32_t getRegisterBitSize (uint32_t r) const override
 
virtual uint32_t getRegisterByteSize (uint32_t r) const override
 
virtual llvm::Type * getRegisterType (uint32_t r) const override
 
virtual bool isControlFlowInstruction (cs_insn &i) const override
 
virtual bool isCallInstruction (cs_insn &i) const override
 
virtual bool isReturnInstruction (cs_insn &i) const override
 
virtual bool isBranchInstruction (cs_insn &i) const override
 
virtual bool isCondBranchInstruction (cs_insn &i) const override
 
virtual llvm::Module * getModule () const override
 
virtual bool isSpecialAsm2LlvmMapGlobal (llvm::Value *v) const override
 
virtual llvm::StoreInst * isSpecialAsm2LlvmInstr (llvm::Value *v) const override
 
virtual llvm::GlobalVariable * getAsm2LlvmMapGlobalVariable () const override
 
virtual bool isCallFunction (llvm::Function *f) const override
 
virtual bool isCallFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionCallFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getCallFunction () const override
 
virtual bool isReturnFunction (llvm::Function *f) const override
 
virtual bool isReturnFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionReturnFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getReturnFunction () const override
 
virtual bool isBranchFunction (llvm::Function *f) const override
 
virtual bool isBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getBranchFunction () const override
 
virtual bool isCondBranchFunction (llvm::Function *f) const override
 
virtual bool isCondBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionCondBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getCondBranchFunction () const override
 
virtual bool isAnyPseudoFunction (llvm::Function *f) const override
 
virtual bool isAnyPseudoFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::GlobalVariable * isRegister (llvm::Value *v) const override
 
virtual uint32_t getCapstoneRegister (llvm::GlobalVariable *gv) const override
 
virtual bool isPseudoAsmFunction (llvm::Function *f) const override
 
virtual bool isPseudoAsmFunctionCall (llvm::CallInst *c) const override
 
virtual const std::set< llvm::Function * > & getPseudoAsmFunctions () const override
 
- Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator
virtual ~Capstone2LlvmIrTranslator ()=default
 

Protected Member Functions

virtual void initializeArchSpecific () override
 
virtual void initializeRegNameMap () override
 
virtual void initializeRegTypeMap () override
 
virtual void initializePseudoCallInstructionIDs () override
 
virtual void generateEnvironmentArchSpecific () override
 
virtual void generateDataLayout () override
 
virtual void generateRegisters () override
 
virtual uint32_t getCarryRegister () override
 
virtual void translateInstruction (cs_insn *i, llvm::IRBuilder<> &irb) override
 
virtual llvm::Value * loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW) override
 
virtual llvm::Value * loadOp (cs_ppc_op &op, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr, bool lea=false) override
 
virtual llvm::StoreInst * storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST) override
 
virtual llvm::Instruction * storeOp (cs_ppc_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST) override
 
void storeCrX (llvm::IRBuilder<> &irb, uint32_t crReg, llvm::Value *op0, llvm::Value *op1=nullptr, bool signedCmp=true)
 
void storeCr0 (llvm::IRBuilder<> &irb, cs_ppc *pi, llvm::Value *val)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value *, llvm::Value * > loadCrX (llvm::IRBuilder<> &irb, uint32_t crReg)
 
llvm::Value * loadCrX (llvm::IRBuilder<> &irb, uint32_t crReg, ppc_cr_types type)
 
bool isGeneralPurposeRegister (uint32_t r)
 
uint32_t getGeneralPurposeRegisterIndex (uint32_t r)
 
uint32_t crBitIndexToCrRegister (uint32_t idx)
 
bool isCrRegister (uint32_t r)
 
bool isCrRegister (cs_ppc_op &op)
 
virtual bool isOperandRegister (cs_ppc_op &op) override
 
void translateAdd (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAddc (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAdde (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAddis (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAddme (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAddze (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAnd (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAndc (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateAndis (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateB (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateClrlwi (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateCmp (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateCntlzw (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateCrModifTernary (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateCrNotMove (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateCrSetClr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateDivw (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateEqv (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateExtendSign (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateLhbrx (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateLi (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateLis (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateLoad (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateLoadIndexed (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMcrf (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMfctr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMflr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMtcrf (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMtcr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMtctr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMtlr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMulhw (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateMullw (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateNand (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateNeg (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateNop (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateNor (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateNot (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateOr (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateOrc (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateOris (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateRotateComplex5op (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateRotlw (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateShiftLeft (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateShiftRight (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSlwi (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSrwi (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSraw (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateStore (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateStoreIndexed (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSubf (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSubfc (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSubfe (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSubfme (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateSubfze (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateXor (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
void translateXoris (cs_insn *i, cs_ppc *pi, llvm::IRBuilder<> &irb)
 
- Protected Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >
llvm::Value * generateTypeConversion (llvm::IRBuilder<> &irb, llvm::Value *from, llvm::Type *to, eOpConv ct)
 
llvm::Type * _checkTypeConversion (llvm::IRBuilder<> &irb, llvm::Type *to, eOpConv ct)
 
virtual void initialize ()
 
virtual void openHandle ()
 
virtual void configureHandle ()
 
virtual void closeHandle ()
 
virtual void generateEnvironment ()
 
virtual void generateSpecialAsm2LlvmMapGlobal ()
 
virtual llvm::StoreInst * generateSpecialAsm2LlvmInstr (llvm::IRBuilder<> &irb, cs_insn *i)
 
virtual void generateCallFunction ()
 
virtual llvm::CallInst * generateCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual llvm::CallInst * generateCondCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual void generateReturnFunction ()
 
virtual llvm::CallInst * generateReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual llvm::CallInst * generateCondReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual void generateBranchFunction ()
 
virtual llvm::CallInst * generateBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual void generateCondBranchFunction ()
 
virtual llvm::CallInst * generateCondBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual llvm::GlobalVariable * createRegister (uint32_t r, llvm::GlobalValue::LinkageTypes lt=llvm::GlobalValue::LinkageTypes::InternalLinkage, llvm::Constant *initializer=nullptr)
 
virtual llvm::Value * loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW)=0
 
llvm::Value * loadOp (cs_ppc *ci, llvm::IRBuilder<> &irb, std::size_t idx, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
virtual llvm::Instruction * storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0
 
virtual llvm::Instruction * storeOp (cs_ppc_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0
 
std::vector< llvm::Value * > _loadOps (cs_ppc *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
std::vector< llvm::Value * > _loadOpsUniversal (cs_ppc *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, eOpConv ict=eOpConv::SEXT_TRUNC_OR_BITCAST, eOpConv fct=eOpConv::FPCAST_OR_BITCAST)
 
llvm::Value * loadOpUnary (cs_ppc *ci, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, llvm::Type *loadType=nullptr, eOpConv ct=eOpConv::THROW)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_ppc *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_ppc *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_ppc *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
llvm::Value * loadOpBinaryOp0 (cs_ppc *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr)
 
llvm::Value * loadOpBinaryOp1 (cs_ppc *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_ppc *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_ppc *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_ppc *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinaryOrTernaryOp1Op2 (cs_ppc *ai, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinaryOrTernaryOp1Op2 (cs_ppc *ai, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpQuaternaryOp1Op2Op3 (cs_ppc *ai, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAdd (llvm::Value *add, llvm::Value *op0, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAddC (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateCarryAddInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAddCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateOverflowAdd (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateOverflowAddC (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateOverflowSub (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateOverflowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateBorrowSub (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateBorrowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateBorrowSubInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateBorrowSubCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::IntegerType * getDefaultType ()
 
llvm::Value * getThisInsnAddress (cs_insn *i)
 
llvm::Value * getNextInsnAddress (cs_insn *i)
 
llvm::BranchInst * getCondBranchForInsnInIfThen (llvm::Instruction *i) const
 
std::string getPseudoAsmFunctionName (cs_insn *insn)
 
llvm::Function * getPseudoAsmFunction (cs_insn *insn, llvm::FunctionType *type, const std::string &name="")
 
llvm::Function * getPseudoAsmFunction (cs_insn *insn, llvm::Type *retType, llvm::ArrayRef< llvm::Type * > params, const std::string &name="")
 
void translatePseudoAsmOp0Fnc (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1Op2 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1Op2 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1Op2 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1Op2Op3 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1Op2Op3 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1Op2Op3 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0Op1FncOp0Op1Op2Op3 (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
virtual uint8_t getOperandAccess (cs_ppc_op &op)
 
virtual void translatePseudoAsmGeneric (cs_insn *i, cs_ppc *ci, llvm::IRBuilder<> &irb)
 
void throwUnexpectedOperands (cs_insn *i, const std::string comment="")
 
void throwUnhandledInstructions (cs_insn *i, const std::string comment="")
 

Static Protected Attributes

static std::map< std::size_t, void(Capstone2LlvmIrTranslatorPowerpc_impl::*)(cs_insn *i, cs_ppc *, llvm::IRBuilder<> &)> _i2fm
 

Additional Inherited Members

- Static Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArch (cs_arch a, llvm::Module *m, cs_mode basic=CS_MODE_LITTLE_ENDIAN, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArm (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateThumb (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArm64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips3 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips32R6 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_16 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpc32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpc64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpcQpx (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateSparc (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateSysz (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateXcore (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
- Protected Types inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >
enum class  eOpConv
 
- Protected Attributes inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >
csh _handle
 
cs_arch _arch
 
cs_mode _basicMode
 
cs_mode _extraMode
 
cs_mode _origBasicMode
 
llvm::Module * _module
 
llvm::GlobalVariable * _asm2llvmGv
 
llvm::Function * _callFunction
 
llvm::Function * _returnFunction
 
llvm::Function * _branchFunction
 
llvm::Function * _condBranchFunction
 
llvm::GlobalValue::LinkageTypes _regLt
 
std::map< std::pair< std::string, llvm::FunctionType * >, llvm::Function * > _insn2asmFunctions
 (fnc_name, fnc_type) -> fnc More...
 
std::set< llvm::Function * > _asmFunctions
 
std::map< uint32_t, std::string > _reg2name
 
std::map< uint32_t, llvm::Type * > _reg2type
 
std::map< llvm::GlobalVariable *, uint32_t > _llvm2CapstoneRegs
 
std::map< uint32_t, llvm::GlobalVariable * > _capstone2LlvmRegs
 
llvm::CallInst * _branchGenerated
 
bool _inCondition
 
llvm::Value * op0
 
llvm::Value * op1
 
llvm::Value * op2
 
llvm::Value * op3
 
cs_insn * _insn
 Capstone instruction being currently translated. More...
 
std::set< unsigned int > _callInsnIds
 
std::set< unsigned int > _returnInsnIds
 
std::set< unsigned int > _branchInsnIds
 
std::set< unsigned int > _condBranchInsnIds
 
std::set< unsigned int > _controlFlowInsnIds
 
bool _ignoreUnexpectedOperands
 
bool _ignoreUnhandledInstructions
 
bool _generatePseudoAsmFunctions
 

Constructor & Destructor Documentation

◆ Capstone2LlvmIrTranslatorPowerpc_impl()

retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::Capstone2LlvmIrTranslatorPowerpc_impl ( llvm::Module *  m,
cs_mode  basic = CS_MODE_32,
cs_mode  extra = CS_MODE_LITTLE_ENDIAN 
)

Member Function Documentation

◆ crBitIndexToCrRegister()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::crBitIndexToCrRegister ( uint32_t  idx)
protected

0 -> PPC_REG_CR0_LT 1 -> PPC_REG_CR0_GT 2 -> PPC_REG_CR0_EQ 3 -> PPC_REG_CR0_SO 4 -> PPC_REG_CR1_LT 5 -> PPC_REG_CR2_GT ... 30 -> PPC_REG_CR7_EQ 31 -> PPC_REG_CR7_SO

◆ generateDataLayout()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::generateDataLayout ( )
overrideprotectedvirtual

Generate LLVM data layout into the module. This is architecture and mode specific and must be implemented in concrete classes.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ generateEnvironmentArchSpecific()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::generateEnvironmentArchSpecific ( )
overrideprotectedvirtual

Generate architecture specific environment on top of common environment generated by generateEnvironment().

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ generateRegisters()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::generateRegisters ( )
overrideprotectedvirtual

Generate LLVM global variables for registers. This is architecture and mode specific and must be implemented in concrete classes.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ getArchByteSize()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::getArchByteSize ( )
overridevirtual
Returns
Architecture byte size according to the currently set basic mode.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ getCarryRegister()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::getCarryRegister ( )
overrideprotectedvirtual

◆ getGeneralPurposeRegisterIndex()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::getGeneralPurposeRegisterIndex ( uint32_t  r)
protected

◆ initializeArchSpecific()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::initializeArchSpecific ( )
overrideprotectedvirtual

Do architecture and mode specific initialization on top of common initialization done by initialize();

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ initializePseudoCallInstructionIDs()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::initializePseudoCallInstructionIDs ( )
overrideprotectedvirtual

If possible, initialize _callInsnIds, _returnInsnIds, _branchInsnIds, _condBranchInsnIds, _condBranchInsnIds sets.

For some architectures, it is not possible to initialize all the instructions that may generate control flow change. E.g. Any kind of ARM instruction that writes to PC is changing control flow.

This is not ideal, because each time some instruction that generates one of these is added, or removed, its ID must also be manualy added, or removed, here. This could be easily forgotten. Right now, I do not know how to solve this better (i.e. automatic update).

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ initializeRegNameMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::initializeRegNameMap ( )
overrideprotectedvirtual

Initialize _reg2name. See comment for _reg2name to know what must be initialized, and what may or may not be initialized.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ initializeRegTypeMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::initializeRegTypeMap ( )
overrideprotectedvirtual

Initialize _reg2type. See comment for _reg2type to know what must be initialized, and what may or may not be initialized.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ isAllowedBasicMode()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::isAllowedBasicMode ( cs_mode  m)
overridevirtual

Check if mode m is an allowed basic mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.

Returns
True if mode is allowed, false otherwise.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ isAllowedExtraMode()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::isAllowedExtraMode ( cs_mode  m)
overridevirtual

Check if mode m is an allowed extra mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.

Returns
True if mode is allowed, false otherwise.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ isCrRegister() [1/2]

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::isCrRegister ( cs_ppc_op &  op)
protected

◆ isCrRegister() [2/2]

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::isCrRegister ( uint32_t  r)
protected

◆ isGeneralPurposeRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::isGeneralPurposeRegister ( uint32_t  r)
protected

◆ isOperandRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::isOperandRegister ( cs_ppc_op &  op)
overrideprotectedvirtual

◆ loadCrX() [1/2]

std::tuple< llvm::Value *, llvm::Value *, llvm::Value *, llvm::Value * > retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::loadCrX ( llvm::IRBuilder<> &  irb,
uint32_t  crReg 
)
protected

◆ loadCrX() [2/2]

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::loadCrX ( llvm::IRBuilder<> &  irb,
uint32_t  crReg,
ppc_cr_types  type 
)
protected

◆ loadOp()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::loadOp ( cs_ppc_op &  op,
llvm::IRBuilder<> &  irb,
llvm::Type *  ty = nullptr,
bool  lea = false 
)
overrideprotectedvirtual

◆ loadRegister()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::loadRegister ( uint32_t  r,
llvm::IRBuilder<> &  irb,
llvm::Type *  dstType = nullptr,
eOpConv  ct = eOpConv::THROW 
)
overrideprotectedvirtual

◆ storeCr0()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::storeCr0 ( llvm::IRBuilder<> &  irb,
cs_ppc *  pi,
llvm::Value *  val 
)
protected

◆ storeCrX()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::storeCrX ( llvm::IRBuilder<> &  irb,
uint32_t  crReg,
llvm::Value *  op0,
llvm::Value *  op1 = nullptr,
bool  signedCmp = true 
)
protected

◆ storeOp()

llvm::Instruction * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::storeOp ( cs_ppc_op &  op,
llvm::Value *  val,
llvm::IRBuilder<> &  irb,
eOpConv  ct = eOpConv::SEXT_TRUNC_OR_BITCAST 
)
overrideprotectedvirtual

◆ storeRegister()

llvm::StoreInst * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::storeRegister ( uint32_t  r,
llvm::Value *  val,
llvm::IRBuilder<> &  irb,
eOpConv  ct = eOpConv::SEXT_TRUNC_OR_BITCAST 
)
overrideprotectedvirtual

◆ translateAdd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAdd ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ADD, PPC_INS_ADDI PPC_INS_LA - 1. and 2. operands are reversed, but it probbaly does not matter. la 0, 0x4, 1 (reg, imm, reg) == addi 0, 1, 0x4 (reg, reg, imm)

◆ translateAddc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAddc ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ADDC, PPC_INS_ADDIC

◆ translateAdde()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAdde ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ADDE

◆ translateAddis()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAddis ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ADDIS

◆ translateAddme()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAddme ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ADDME

◆ translateAddze()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAddze ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ADDZE

◆ translateAnd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAnd ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_AND, PPC_INS_ANDI

◆ translateAndc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAndc ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ANDC

◆ translateAndis()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateAndis ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ANDIS

◆ translateB()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateB ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

link = Store next insn address to LR. toLR = Branch to LR. toCTR = branch to CTR. primal = Complex variants all other simplified mnemonics are derived from. Right now, we probably will not be able handle it – to many ops. E.g. bc BO, BI, target_addr No idea if Capstone actually generates this with three ops.

Basic unconditional branches (not really, it can be conditional): PPC_INS_B - uncond/cond (blt, beq, bne, ...) PPC_INS_BA - absolute, cond/uncond PPC_INS_BL - link, cond/uncond PPC_INS_BLA - link, absolute, cond/uncond

Basic conditional branches (not really sure it they are ever used): PPC_INS_BC - cond, primal PPC_INS_BCA - cond, absolute, primal PPC_INS_BCLR - cond, toLR, primal PPC_INS_BCCTR - cond, toCTR, primal PPC_INS_BCL - cond, link, primal PPC_INS_BCLA - cond, absolute, link, primal PPC_INS_BCLRL - cond, toLR, link, primal PPC_INS_BCCTRL - cond, toCTR, link, primal

Branch unconditionally (not really, it can be conditional): PPC_INS_BLR - uncond/cond (beqlr, ...), toLR PPC_INS_BCTR - uncond/cond, toCTR PPC_INS_BLRL - uncond/cond, toLR, link PPC_INS_BCTRL - uncond/cond, toCTR, link

Branch if condition true: Not sure if these are ever used, looks like they are equal to: (equal to b, ba, blr, bctr, bl, bla, blrl, bctrl). PPC_INS_BT - cond => (b) PPC_INS_BTA - cond, absolute => (ba) PPC_INS_BTLR - cond, toLR => (blr) PPC_INS_BTCTR - cond, toCTR => (bctr) PPC_INS_BTL - cond, link => (bl) PPC_INS_BTLA - cond, link, absolute => (bla) PPC_INS_BTLRL - cond, link, toLR => (blrl) PPC_INS_BTCTRL - cond, link, toCTR => (bctrl)

Branch if condition false: Not sure if these are ever used, looks like they are translated to: (b, ba, blr, bctr, bl, bla, blrl, bctrl) reversed conditions. PPC_INS_BF - cond => (b) PPC_INS_BFA - cond, absolute => (ba) PPC_INS_BFLR - cond, toLR => (blr) PPC_INS_BFCTR - cond, toCTR => (bctr) PPC_INS_BFL - cond, link => (bl) PPC_INS_BFLA - cond, link, absolute => (bla) PPC_INS_BFLRL - cond, link, toLR => (blrl) PPC_INS_BFCTRL - cond, link, toCTR => (bctrl)

Decrement CTR, branch if CTR != 0: PPC_INS_BDNZ - cond PPC_INS_BDNZA - cond, absolute PPC_INS_BDNZLR - cond, toLR PPC_INS_BDNZL - cond, link PPC_INS_BDNZLA - cond, absolute, link PPC_INS_BDNZLRL - cond, link, toLR

Decrement CTR, branch if CTR != 0 & cond true: PPC_INS_BDNZT - cond PPC_INS_BDNZTA - cond, absolute PPC_INS_BDNZTLR - cond, toLR PPC_INS_BDNZTL - cond, link PPC_INS_BDNZTLA - cond, absolute, link PPC_INS_BDNZTLRL - cond, link, toLR

Decrement CTR, branch if CTR != 0 & cond false: PPC_INS_BDNZF - cond PPC_INS_BDNZFA - cond, absolute PPC_INS_BDNZFLR - cond, toLR, (missing) PPC_INS_BDNZFL - cond, link PPC_INS_BDNZFLA - cond, ansolute, link PPC_INS_BDNZFLRL - cond, link, toLR

Decrement CTR, branch if CTR == 0: PPC_INS_BDZ - cond PPC_INS_BDZA - cond, absolute PPC_INS_BDZLR - cond, toLR PPC_INS_BDZL - cond, link PPC_INS_BDZLA - cond, absolute, link PPC_INS_BDZLRL - cond, link, toLR

Decrement CTR, branch if CTR == 0 & cond true: PPC_INS_BDZT - cond PPC_INS_BDZTA - cond, absolute PPC_INS_BDZTLR - cond, toLR PPC_INS_BDZTL - cond, link PPC_INS_BDZTLA - cond, absolute, link PPC_INS_BDZTLRL - cond, link, toLR

Decrement CTR, branch if CTR == 0 & cond false: PPC_INS_BDZF - cond PPC_INS_BDZFA - cond, absolute PPC_INS_BDZFLR - cond, toLR PPC_INS_BDZFL - cond, link PPC_INS_BDZFLA - cond, absolute, link PPC_INS_BDZFLRL - cond, link, toLR

◆ translateClrlwi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateClrlwi ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_CLRLWI - clrlwi rA, RS, n (n < 32) = rlwinm rA, rS, 0, n, 31

◆ translateCmp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateCmp ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_CMPD = cmp 0, 1, rA, rB But Capstone also allows things like "cmpd cr5, 0, 1"

PPC_INS_CMPDI = cmpi 0, 1, rA, value But Capstone also allows things like "cmpdi cr5, 0, 1"

PPC_INS_CMPW, PPC_INS_CMPWI PPC_INS_CMPLD, PPC_INS_CMPLDI PPC_INS_CMPLW, PPC_INS_CMPLWI

◆ translateCntlzw()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateCntlzw ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_CNTLZW

◆ translateCrModifTernary()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateCrModifTernary ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_CRAND, PPC_INS_CRANDC, PPC_INS_CREQV, PPC_INS_CRNAND, PPC_INS_CRNOR, PPC_INS_CROR, PPC_INS_CRORC, PPC_INS_CRXOR

◆ translateCrNotMove()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateCrNotMove ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_CRNOT - crnot bx, by = crnor bx, by, by PPC_INS_CRMOVE - crmove bx, by = cror bx, by, by

◆ translateCrSetClr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateCrSetClr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_CRSET - set CR bit PPC_INS_CRCLR - clear CR bit Unary, operand is general purpose register r0-r31 == bit 0-31 of CR.

◆ translateDivw()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateDivw ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_DIVW, PPC_INS_DIVWU

◆ translateEqv()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateEqv ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_EQV

◆ translateExtendSign()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateExtendSign ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_EXTSB, PPC_INS_EXTSH, PPC_INS_EXTSW

◆ translateInstruction()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateInstruction ( cs_insn *  i,
llvm::IRBuilder<> &  irb 
)
overrideprotectedvirtual

Translate single Capstone instruction.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_ppc, cs_ppc_op >.

◆ translateLhbrx()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateLhbrx ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_LHBRX TODO: Maybe model this as ASM pseudo call as PPC_INS_LWBRX.

◆ translateLi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateLi ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_LI = addi rD, 0, value

◆ translateLis()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateLis ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_LIS = addis rD, 0, value

◆ translateLoad()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateLoad ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_LBZ, PPC_INS_LHZ, PPC_INS_LWZ, PPC_INS_LBZU, PPC_INS_LHZU, PPC_INS_LWZU, PPC_INS_LHA, PPC_INS_LHAU

◆ translateLoadIndexed()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateLoadIndexed ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_LBZX, PPC_INS_LHZX, PPC_INS_LWZX, PPC_INS_LBZUX, PPC_INS_LHZUX, PPC_INS_LWZUX, PPC_INS_LHAX, PPC_INS_LHAUX

◆ translateMcrf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMcrf ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MCRF

◆ translateMfctr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMfctr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MFCTR

◆ translateMflr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMflr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MFLR

◆ translateMr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MR

◆ translateMtcr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMtcr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MTCR

◆ translateMtcrf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMtcrf ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MTCRF

◆ translateMtctr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMtctr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MTCTR

◆ translateMtlr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMtlr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MTLR

◆ translateMulhw()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMulhw ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MULHW, PPC_INS_MULHWU

◆ translateMullw()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateMullw ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_MULLW, PPC_INS_MULLI

◆ translateNand()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateNand ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_NAND

◆ translateNeg()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateNeg ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_NEG

◆ translateNop()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateNop ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_NOP

◆ translateNor()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateNor ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_NOR

◆ translateNot()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateNot ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_NOT

◆ translateOr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateOr ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_OR, PPC_INS_ORI

◆ translateOrc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateOrc ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ORC

◆ translateOris()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateOris ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ORIS

◆ translateRotateComplex5op()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateRotateComplex5op ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_RLWINM, PPC_INS_RLWIMI, PPC_INS_RLWNM

◆ translateRotlw()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateRotlw ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_ROTLW, PPC_INS_ROTLWI

◆ translateShiftLeft()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateShiftLeft ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SLW

◆ translateShiftRight()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateShiftRight ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SRW

◆ translateSlwi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSlwi ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SLWI

◆ translateSraw()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSraw ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SRAW, PPC_INS_SRAWI - Shift Right Algebraic TODO: super ugly, do we need it? use pseudo asm?

◆ translateSrwi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSrwi ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SRWI

◆ translateStore()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateStore ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_STB, PPC_INS_STH, PPC_INS_STW, PPC_INS_STBU, PPC_INS_STHU, PPC_INS_STWU,

◆ translateStoreIndexed()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateStoreIndexed ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_STBX, PPC_INS_STHX, PPC_INS_STWX, PPC_INS_STBUX, PPC_INS_STHUX, PPC_INS_STWUX,

◆ translateSubf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSubf ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SUBF, PPC_INS_SUB - sub rD, rA, rB = subf rD, rB, rA

◆ translateSubfc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSubfc ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SUBFC, PPC_INS_SUBFIC PPC_INS_SUBC - subfc rD, rA, rB = subfc rD, rB, rA TODO: This is different than the original semantics, it is according to PowerPC specification.

◆ translateSubfe()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSubfe ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SUBFE

◆ translateSubfme()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSubfme ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SUBFME TODO: This is modeled as it was in an old semantics, It looks a bit different than in specification, but it may be doing the same thing, or may not, I'm not really sure.

◆ translateSubfze()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateSubfze ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_SUBFZE

◆ translateXor()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateXor ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_XOR, PPC_INS_XORI

◆ translateXoris()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::translateXoris ( cs_insn *  i,
cs_ppc *  pi,
llvm::IRBuilder<> &  irb 
)
protected

PPC_INS_XORIS

Member Data Documentation

◆ _i2fm

std::map< std::size_t, void(Capstone2LlvmIrTranslatorPowerpc_impl::*)(cs_insn *i, cs_ppc *, llvm::IRBuilder<> &)> retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl::_i2fm
staticprotected

The documentation for this class was generated from the following files: