retdec
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#include <capstone2llvmir_impl.h>
Public Member Functions | |
Capstone2LlvmIrTranslator_impl (cs_arch a, cs_mode basic, cs_mode extra, llvm::Module *m) | |
virtual | ~Capstone2LlvmIrTranslator_impl () |
virtual void | setIgnoreUnexpectedOperands (bool f) override |
virtual void | setIgnoreUnhandledInstructions (bool f) override |
virtual void | setGeneratePseudoAsmFunctions (bool f) override |
virtual bool | isIgnoreUnexpectedOperands () const override |
virtual bool | isIgnoreUnhandledInstructions () const override |
virtual bool | isGeneratePseudoAsmFunctions () const override |
virtual void | modifyBasicMode (cs_mode m) override |
virtual void | modifyExtraMode (cs_mode m) override |
virtual uint32_t | getArchBitSize () override |
virtual TranslationResult | translate (const uint8_t *bytes, std::size_t size, retdec::common::Address a, llvm::IRBuilder<> &irb, std::size_t count=0, bool stopOnBranch=false) override |
virtual TranslationResultOne | translateOne (const uint8_t *&bytes, std::size_t &size, retdec::common::Address &a, llvm::IRBuilder<> &irb) override |
virtual const csh & | getCapstoneEngine () const override |
virtual cs_arch | getArchitecture () const override |
virtual cs_mode | getBasicMode () const override |
virtual cs_mode | getExtraMode () const override |
virtual bool | hasDelaySlot (uint32_t id) const override |
virtual bool | hasDelaySlotTypical (uint32_t id) const override |
virtual bool | hasDelaySlotLikely (uint32_t id) const override |
virtual std::size_t | getDelaySlot (uint32_t id) const override |
virtual llvm::GlobalVariable * | getRegister (uint32_t r) override |
virtual std::string | getRegisterName (uint32_t r) const override |
virtual uint32_t | getRegisterBitSize (uint32_t r) const override |
virtual uint32_t | getRegisterByteSize (uint32_t r) const override |
virtual llvm::Type * | getRegisterType (uint32_t r) const override |
virtual bool | isControlFlowInstruction (cs_insn &i) const override |
virtual bool | isCallInstruction (cs_insn &i) const override |
virtual bool | isReturnInstruction (cs_insn &i) const override |
virtual bool | isBranchInstruction (cs_insn &i) const override |
virtual bool | isCondBranchInstruction (cs_insn &i) const override |
virtual llvm::Module * | getModule () const override |
virtual bool | isSpecialAsm2LlvmMapGlobal (llvm::Value *v) const override |
virtual llvm::StoreInst * | isSpecialAsm2LlvmInstr (llvm::Value *v) const override |
virtual llvm::GlobalVariable * | getAsm2LlvmMapGlobalVariable () const override |
virtual bool | isCallFunction (llvm::Function *f) const override |
virtual bool | isCallFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionCallFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getCallFunction () const override |
virtual bool | isReturnFunction (llvm::Function *f) const override |
virtual bool | isReturnFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionReturnFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getReturnFunction () const override |
virtual bool | isBranchFunction (llvm::Function *f) const override |
virtual bool | isBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getBranchFunction () const override |
virtual bool | isCondBranchFunction (llvm::Function *f) const override |
virtual bool | isCondBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionCondBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getCondBranchFunction () const override |
virtual bool | isAnyPseudoFunction (llvm::Function *f) const override |
virtual bool | isAnyPseudoFunctionCall (llvm::CallInst *c) const override |
virtual llvm::GlobalVariable * | isRegister (llvm::Value *v) const override |
virtual uint32_t | getCapstoneRegister (llvm::GlobalVariable *gv) const override |
virtual bool | isPseudoAsmFunction (llvm::Function *f) const override |
virtual bool | isPseudoAsmFunctionCall (llvm::CallInst *c) const override |
virtual const std::set< llvm::Function * > & | getPseudoAsmFunctions () const override |
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virtual | ~Capstone2LlvmIrTranslator ()=default |
virtual bool | isAllowedBasicMode (cs_mode m)=0 |
virtual bool | isAllowedExtraMode (cs_mode m)=0 |
virtual uint32_t | getArchByteSize ()=0 |
Protected Types | |
enum class | eOpConv { THROW , NOTHING , ZEXT_TRUNC_OR_BITCAST , SEXT_TRUNC_OR_BITCAST , FPCAST_OR_BITCAST , SITOFP_OR_FPCAST , UITOFP_OR_FPCAST } |
Protected Member Functions | |
llvm::Value * | generateTypeConversion (llvm::IRBuilder<> &irb, llvm::Value *from, llvm::Type *to, eOpConv ct) |
llvm::Type * | _checkTypeConversion (llvm::IRBuilder<> &irb, llvm::Type *to, eOpConv ct) |
virtual void | initializeArchSpecific ()=0 |
virtual void | initializeRegNameMap ()=0 |
virtual void | initializeRegTypeMap ()=0 |
virtual void | initializePseudoCallInstructionIDs ()=0 |
virtual void | generateEnvironmentArchSpecific ()=0 |
virtual void | generateRegisters ()=0 |
virtual void | generateDataLayout ()=0 |
virtual uint32_t | getCarryRegister ()=0 |
virtual void | translateInstruction (cs_insn *i, llvm::IRBuilder<> &irb)=0 |
virtual void | initialize () |
virtual void | openHandle () |
virtual void | configureHandle () |
virtual void | closeHandle () |
virtual void | generateEnvironment () |
virtual void | generateSpecialAsm2LlvmMapGlobal () |
virtual llvm::StoreInst * | generateSpecialAsm2LlvmInstr (llvm::IRBuilder<> &irb, cs_insn *i) |
virtual void | generateCallFunction () |
virtual llvm::CallInst * | generateCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t) |
virtual llvm::CallInst * | generateCondCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t) |
virtual void | generateReturnFunction () |
virtual llvm::CallInst * | generateReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t) |
virtual llvm::CallInst * | generateCondReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t) |
virtual void | generateBranchFunction () |
virtual llvm::CallInst * | generateBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t) |
virtual void | generateCondBranchFunction () |
virtual llvm::CallInst * | generateCondBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t) |
virtual llvm::GlobalVariable * | createRegister (uint32_t r, llvm::GlobalValue::LinkageTypes lt=llvm::GlobalValue::LinkageTypes::InternalLinkage, llvm::Constant *initializer=nullptr) |
virtual llvm::Value * | loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW)=0 |
virtual llvm::Value * | loadOp (CInsnOp &op, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr, bool lea=false)=0 |
virtual llvm::Instruction * | storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0 |
virtual llvm::Instruction * | storeOp (CInsnOp &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0 |
llvm::Value * | loadOp (CInsn *ci, llvm::IRBuilder<> &irb, std::size_t idx, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
std::vector< llvm::Value * > | _loadOps (CInsn *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
std::vector< llvm::Value * > | _loadOpsUniversal (CInsn *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, eOpConv ict=eOpConv::SEXT_TRUNC_OR_BITCAST, eOpConv fct=eOpConv::FPCAST_OR_BITCAST) |
llvm::Value * | loadOpUnary (CInsn *ci, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, llvm::Type *loadType=nullptr, eOpConv ct=eOpConv::THROW) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinary (CInsn *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinary (CInsn *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinary (CInsn *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
llvm::Value * | loadOpBinaryOp0 (CInsn *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr) |
llvm::Value * | loadOpBinaryOp1 (CInsn *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpTernary (CInsn *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpTernary (CInsn *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpTernary (CInsn *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinaryOrTernaryOp1Op2 (CInsn *ai, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinaryOrTernaryOp1Op2 (CInsn *ai, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpQuaternaryOp1Op2Op3 (CInsn *ai, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCarryAdd (llvm::Value *add, llvm::Value *op0, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCarryAddC (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateCarryAddInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCarryAddCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateOverflowAdd (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateOverflowAddC (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateOverflowSub (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateOverflowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateBorrowSub (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateBorrowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateBorrowSubInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateBorrowSubCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::IntegerType * | getDefaultType () |
llvm::Value * | getThisInsnAddress (cs_insn *i) |
llvm::Value * | getNextInsnAddress (cs_insn *i) |
llvm::BranchInst * | getCondBranchForInsnInIfThen (llvm::Instruction *i) const |
std::string | getPseudoAsmFunctionName (cs_insn *insn) |
llvm::Function * | getPseudoAsmFunction (cs_insn *insn, llvm::FunctionType *type, const std::string &name="") |
llvm::Function * | getPseudoAsmFunction (cs_insn *insn, llvm::Type *retType, llvm::ArrayRef< llvm::Type * > params, const std::string &name="") |
void | translatePseudoAsmOp0Fnc (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0Op1 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp1 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0Op1 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0Op1Op2 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp1Op2 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0Op1Op2 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0Op1Op2Op3 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp1Op2Op3 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0Op1Op2Op3 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0Op1FncOp0Op1Op2Op3 (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
virtual bool | isOperandRegister (CInsnOp &op)=0 |
virtual uint8_t | getOperandAccess (CInsnOp &op) |
virtual void | translatePseudoAsmGeneric (cs_insn *i, CInsn *ci, llvm::IRBuilder<> &irb) |
void | throwUnexpectedOperands (cs_insn *i, const std::string comment="") |
void | throwUnhandledInstructions (cs_insn *i, const std::string comment="") |
Protected Attributes | |
csh | _handle = 0 |
cs_arch | _arch = CS_ARCH_ALL |
cs_mode | _basicMode = CS_MODE_LITTLE_ENDIAN |
cs_mode | _extraMode = CS_MODE_LITTLE_ENDIAN |
cs_mode | _origBasicMode = CS_MODE_LITTLE_ENDIAN |
llvm::Module * | _module = nullptr |
llvm::GlobalVariable * | _asm2llvmGv = nullptr |
llvm::Function * | _callFunction = nullptr |
llvm::Function * | _returnFunction = nullptr |
llvm::Function * | _branchFunction = nullptr |
llvm::Function * | _condBranchFunction = nullptr |
llvm::GlobalValue::LinkageTypes | _regLt |
std::map< std::pair< std::string, llvm::FunctionType * >, llvm::Function * > | _insn2asmFunctions |
(fnc_name, fnc_type) -> fnc More... | |
std::set< llvm::Function * > | _asmFunctions |
std::map< uint32_t, std::string > | _reg2name |
std::map< uint32_t, llvm::Type * > | _reg2type |
std::map< llvm::GlobalVariable *, uint32_t > | _llvm2CapstoneRegs |
std::map< uint32_t, llvm::GlobalVariable * > | _capstone2LlvmRegs |
llvm::CallInst * | _branchGenerated = nullptr |
bool | _inCondition = false |
llvm::Value * | op0 = nullptr |
llvm::Value * | op1 = nullptr |
llvm::Value * | op2 = nullptr |
llvm::Value * | op3 = nullptr |
cs_insn * | _insn = nullptr |
Capstone instruction being currently translated. More... | |
std::set< unsigned int > | _callInsnIds |
std::set< unsigned int > | _returnInsnIds |
std::set< unsigned int > | _branchInsnIds |
std::set< unsigned int > | _condBranchInsnIds |
std::set< unsigned int > | _controlFlowInsnIds |
bool | _ignoreUnexpectedOperands = true |
bool | _ignoreUnhandledInstructions = true |
bool | _generatePseudoAsmFunctions = true |
Additional Inherited Members | |
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static std::unique_ptr< Capstone2LlvmIrTranslator > | createArch (cs_arch a, llvm::Module *m, cs_mode basic=CS_MODE_LITTLE_ENDIAN, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createArm (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createThumb (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createArm64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips3 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips32R6 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createX86_16 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createX86_32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createX86_64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createPpc32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createPpc64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createPpcQpx (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createSparc (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createSysz (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createXcore (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
Private implementation class.
Implements a lot of stuff from Capstone2LlvmIrTranslator
public interface that is common for all translators. However:
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strongprotected |
What should instruction operand loading method do if types of loaded operands are not the same.
retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< CInsn, CInsnOp >::Capstone2LlvmIrTranslator_impl | ( | cs_arch | a, |
cs_mode | basic, | ||
cs_mode | extra, | ||
llvm::Module * | m | ||
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Internal method used to correct type used for operands convertion based on specified "convertion type method" - ct.
irb | LLVM IR Builder required for IR modifications. |
to | result type that will be used to convert operands. |
ct | convertion method by which will be opeands converted to the resut type. |
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Create LLVM loads for LLVM values representing last N operands (opCnt) of specified instruction. If strict check is set, this method will check wheater number of operands of the instructions is equal to the "opCnt". If conversion type is set to NOTHING no conversion will happen and each operand may have different size and type.
This method was created to be used in internal load methods. Usage of adequate loadOp(Binary|Ternary|...) is preffered.
ci | Instruction of which operands will be loaded. |
irb | LLVM IR Builder required for IR modifications. |
opCnt | Number of operands that will be loaded. |
strictCheck | If set to true opCnt will be equal as number of operands. Otherwise will load N last operands. |
loadType | Type of loaded value. (not relevant if nullptr) |
dstType | Desired type of loaded value (not changed if nullptr). |
ct | Used conversion. Defaultly NOTHING as "do not convert". |
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Similiar functionality as _loadOps
but used conversion is determined by type of first loaded operand. This means that if first operand is of integer type then ict
convertion will be used on all other opernads. If first perand is floting point type then used convertion will be fct
.
ci | |
irb | |
opCnt | |
strictCheck | |
ict | Integer convertion type. |
fct | Floting point convertion type. |
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protectedvirtual |
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borrow_sub()
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borrow_sub_c()
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borrow_sub_c_int4()
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borrow_sub_int4()
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protectedvirtual |
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carry_add()
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carry_add_c()
If cf
is not passed, default cf register is used. Why pass it?
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carry_add_c_int4()
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carry_add_int4()
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protectedvirtual |
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protectedvirtual |
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protectedvirtual |
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protectedpure virtual |
Generate LLVM data layout into the module. This is architecture and mode specific and must be implemented in concrete classes.
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
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protectedpure virtual |
Generate architecture specific environment on top of common environment generated by generateEnvironment()
.
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
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overflow_add()
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overflow_add_c()
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overflow_sub()
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overflow_sub_c()
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protectedpure virtual |
Generate LLVM global variables for registers. This is architecture and mode specific and must be implemented in concrete classes.
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
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The generated global variable is unnamed. capstone2llvmir library does not allow to specify or set its name. Users can however get the variable with getAsm2LlvmMapGlobalVariable()
and do whatever they want with it (e.g. rename).
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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gv
if such register exists, zero otherwise (zero equals to
[arch]_REG_INVALID in all Capstone architecture models, e.g. ARM_REG_INVALID
, MIPS_REG_INVALID
). Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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protectedpure virtual |
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
id
. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
Reimplemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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Some architectures do not have this info in operands. Return default value: CS_AC_INVALID.
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protected |
Get already existing asm functions associated with name
, or if there is no such function, create it using name
and type
, add it to asm functions and return it.
insnId
.
|
protected |
The same as getPseudoAsmFunction(std::size_t,std::string&, llvm::FunctionType*)
, but function type is created by this variant.
|
protected |
Generate pseudo assembly function name from the given instruction insn.
|
overridevirtual |
Get all pseudo assembly functions for instructions which full semantics is not implemented.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
r
, or nullptr
if such global does not exist. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
r
. This function works even for the additional registers defined in translators and missing in Capstone (e.g. individual flag registers). Throws Capstone2LlvmIrError
exception if register bit size not found. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
r
. This function works even for the additional registers defined in translators and missing in Capstone (e.g. individual flag registers). Throws Capstone2LlvmIrError
exception if register byte size not found. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
r
. The name may differ from names used by the Capstone library. This function works even for the additional registers defined in translators and missing in Capstone (e.g. individual flag registers). Throws Capstone2LlvmIrError
exception if register name not found. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
r
. This function works even for the additional registers defined in translators and missing in Capstone (e.g. individual flag registers). Throws Capstone2LlvmIrError
exception if register data type not found. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protected |
|
overridevirtual |
Has the specified Capstone instruction id
any kind of delay slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
Reimplemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl.
|
overridevirtual |
Has the specified Capstone instruction id
likely delay slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
Reimplemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl.
|
overridevirtual |
Has the specified Capstone instruction id
typical delay slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
Reimplemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl.
|
protectedvirtual |
|
protectedpure virtual |
Do architecture and mode specific initialization on top of common initialization done by initialize()
;
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
|
protectedpure virtual |
If possible, initialize _callInsnIds
, _returnInsnIds
, _branchInsnIds
, _condBranchInsnIds
, _condBranchInsnIds
sets.
For some architectures, it is not possible to initialize all the instructions that may generate control flow change. E.g. Any kind of ARM instruction that writes to PC is changing control flow.
This is not ideal, because each time some instruction that generates one of these is added, or removed, its ID must also be manualy added, or removed, here. This could be easily forgotten. Right now, I do not know how to solve this better (i.e. automatic update).
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
|
protectedpure virtual |
Initialize _reg2name
. See comment for _reg2name
to know what must be initialized, and what may or may not be initialized.
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
|
protectedpure virtual |
Initialize _reg2type
. See comment for _reg2type
to know what must be initialized, and what may or may not be initialized.
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
|
overridevirtual |
Is the passed LLVM function f
any kind of pseudo function generated by capstone2llvmir (e.g. call/return/br/... function).
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
Reimplemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl.
|
overridevirtual |
Is the passed LLVM call c
any kind of pseudo call generated by capstone2llvmir (e.g. call/return/br/... function call).
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
Reimplemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl.
|
overridevirtual |
Is the passed LLVM function f
the special pseudo function whose call represents branch operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM call instruction c
a special pseudo call instruction representing a branch operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
True
if the Capstone instruction i
is any kind of branch instruction, translation of which would produce branch pseudo call. False
otherwise. isControlFlowInstruction()
for more details. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM function f
the special pseudo function whose call represents call operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM call instruction c
a special pseudo call instruction representing a call operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
True
if the Capstone instruction i
is any kind of call instruction, translation of which would produce call pseudo call. False
otherwise. isControlFlowInstruction()
for more details. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM function f
the special pseudo function whose call represents conditional branch operation in the translated LLVM IR? Function signature:
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM call instruction c
a special pseudo call instruction representing a conditional branch operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
True
if the Capstone instruction i
is any kind of conditional branch instruction, translation of which would produce conditional branch pseudo call. False
otherwise. isControlFlowInstruction()
for more details. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Check if the translation of this instruction will/may produce any kind of control flow changing pseudo call (i.e. call/return/br/condbr pseudo function call).
For ARM, parameter i
must include detail
member - instruction cannot be disassembled with CS_OP_DETAIL = CS_OPT_OFF, or with CS_OP_SKIPDATA = CS_OPT_OFF.
For x86, MIPS, PowerPC, parameter i
may not include detail
member - instruction can be disassembled with CS_OP_DETAIL = CS_OPT_ON, or with CS_OP_SKIPDATA = CS_OPT_ON.
It is sometimes tricky to find this information without actually translating the instruction. On the other hand, for some architectures, it would be possible to give more detailed information (e.g. the kind of pseudo function call), sometimes even from instruction ID alone (i.e. cs_insn::id
):
detail
and replicating the full analysis used in translation.Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
|
overridevirtual |
|
overridevirtual |
|
overridevirtual |
Is isBranchFunctionCall()
true
for the passed LLVM call instruction c
, and execution of the call instruction c
is conditional.
c
if c
is conditional, nullptr
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is isCallFunctionCall()
true
for the passed LLVM call instruction c
, and execution of the call instruction c
is conditional.
c
if c
is conditional, nullptr
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is isCondBranchFunction()
true
for the passed LLVM call instruction c
, and execution of the call instruction c
is conditional.
c
if c
is conditional, nullptr
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is isReturnFunctionCall()
true
for the passed LLVM call instruction c
, and execution of the call instruction c
is conditional.
c
if c
is conditional, nullptr
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protectedpure virtual |
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl.
|
overridevirtual |
Is the passed LLVM function f
any pseudo assembly functions for instructions which full semantics is not implemented?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM call c
any kind of pseudo assembly call for instructions which full semantics is not implemented?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM value v
a global variable representing some HW register?
v
casted to llvm::GlobalVariable
if it is representing some HW register, nullptr
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM function f
the special pseudo function whose call represents return operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM call instruction c
a special pseudo call instruction representing a return operation in the translated LLVM IR?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
True
if the Capstone instruction i
is any kind of return instruction, translation of which would produce return pseudo call. False
otherwise. isControlFlowInstruction()
for more details. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM value v
a special instruction used for LLVM IR <-> Capstone instruction mapping?
v
casted to llvm::StoreInst
if it is a special mapping instruction, nullptr
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Is the passed LLVM value v
the special global variable used for LLVM IR <-> Capstone instruction mapping?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protected |
Creates LLVM load from LLVM value representing operand of instruction ci on index idx. User of this method may specify type to which will be loaded value converted and method of the conversion.
ci | Instruction of which operand will be loaded. |
irb | LLVM IR Builder required for IR modifications. |
idx | Operand index. |
loadType | Type of loaded value. (not relevant if nullptr) |
dstType | Desired type of loaded value (not changed if nullptr). |
ct | Used conversion. Defaultly NOTHING as "do not convert". |
|
protectedpure virtual |
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl.
|
protected |
Throws if op_count != 2.
|
protected |
Throws if op_count != 2.
|
protected |
|
protected |
Throws if op_count != 2.
|
protected |
Throws if op_count != 2.
|
protected |
Throws if op_count not in {2, 3}.
|
protected |
Throws if op_count not in {2, 3}.
|
protected |
Throws if op_count != 4.
|
protected |
Throws if op_count != 3.
|
protected |
Throws if op_count != 3.
|
protected |
Throws if op_count != 3.
|
protected |
Throws if op_count != 1.
|
protectedpure virtual |
Load LLVM register corresponding to Capstone register r
, using instruction builder irb
. Optionally convert the loaded value to type dstType
using cast type ct
.
|
overridevirtual |
Modify basic mode (e.g. CS_MODE_ARM to CS_MODE_THUMB). This must be implemented in concrete classes, so they can check if the requested mode is applicable. Not every basic mode can be used with every architecture. Translators for some architectures (e.g. CS_ARCH_X86) may not even allow switching between modes that is otherwise allowed by Capstone due to internal problems (e.g. different register environments between 16/32/64 x86 architectures).
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Modify extra mode (e.g. CS_MODE_LITTLE_ENDIAN to CS_MODE_BIG_ENDIAN). This must be implemented in concrete classes, so they can check if the requested mode is applicable. Not every special mode can be used with every architecture.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protectedvirtual |
|
overridevirtual |
Should the translator generate pseudo assembly functions for instructions which full semantics is not implemented? True -> generate. False -> don't generate.
Default value: true.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Should the translator ignore unexpected operands encountered in Capstone instructions? True -> ignore -> try recover or ignore the problem. False -> don't ignore -> throw UnexpectedOperandsError
.
Default value: true.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
overridevirtual |
Should the translator ignore unhandled instructions? True -> ignore. False -> don't ignore -> throw UnhandledInstructionError
when instructions without an implemented translation routine is encountered.
Default value: true.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protectedpure virtual |
|
protectedpure virtual |
|
protected |
|
protected |
|
overridevirtual |
Translate the given bytes.
bytes | Bytes to translate. |
size | Size of the bytes buffer. |
a | Memory address where bytes are located. |
irb | LLVM IR builder used to create LLVM IR translation. Translated LLVM IR instructions are created at its current position. |
count | Number of assembly instructions to translate, or 0 to translate them all. |
stopOnBranch | If set, the translation aborts after any kind of branch is encountered (call, return, branch, conditional branch). |
TranslationResult
structure. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protectedpure virtual |
Translate single Capstone instruction.
Implemented in retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorPowerpc_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl, retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl, and retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm_impl.
|
overridevirtual |
Translate one assembly instruction from the given bytes.
bytes | Bytes to translate. This will be updated to point to the next instruction. |
size | Size of the bytes buffer. This will be updated to reflect bytes update. |
a | Memory address where bytes are located. This will be updated to point to the next instruction. |
irb | LLVM IR builder used to create LLVM IR translation. Translated LLVM IR instructions are created at its current position. |
TranslationResult
structure. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
|
protected |
__asm_<mnem>(op0)
|
protected |
__asm_<mnem>(op0, op1)
|
protected |
__asm_<mnem>(op0, op1, op2)
|
protected |
__asm_<mnem>(op0, op1, op2, op3)
|
protectedvirtual |
Generate pseudo asm call using information provided by Capstone.
|
protected |
op0 = __asm_<mnem>()
|
protected |
op0 = __asm_<mnem>(op0)
|
protected |
op0 = __asm_<mnem>(op0, op1)
|
protected |
op0 = __asm_<mnem>(op0, op1, op2)
|
protected |
op0 = __asm_<mnem>(op0, op1, op2, op3)
|
protected |
op0 = __asm_<mnem>(op1)
|
protected |
op0 = __asm_<mnem>(op1, op2)
|
protected |
op0 = __asm_<mnem>(op1, op2, op3)
|
protected |
op0, op1 = __asm_<mnem>(op0, op1, op2, op3)
|
protected |
|
protected |
|
protected |
|
protected |
|
protected |
|
protected |
If the last translated instruction generated branch call, it is stored to this member.
|
protected |
Set of Capstone instruction IDs translation of which would produce branch pseudo call.
|
protected |
|
protected |
Set of Capstone instruction IDs translation of which would produce call pseudo call.
|
protected |
|
protected |
|
protected |
Set of Capstone instruction IDs translation of which would produce conditional branch pseudo call.
|
protected |
Sometimes it is not possible to categorize an instruction ID to one of the sets above without its full analysis. Such instructions can be inserted here. Set of Capstone instruction IDs translation of which may produce any kind of control flow changing pseudo call.
|
protected |
|
protected |
|
protected |
|
protected |
|
protected |
|
protected |
True
if generated branch is in conditional code, e.g. uncond branch in if-then.
|
protected |
Capstone instruction being currently translated.
|
protected |
(fnc_name, fnc_type) -> fnc
|
protected |
Maps with all LLVM registers created by the translator. Used for bidirectional queries.
|
protected |
|
protected |
|
protected |
Register number to register name map. If register number is not mapped here, Capstone's cs_reg_name()
function is used to get the name. All registers added by translator (i.e. registers that are not in the original Capstone register enums) must have entries here. Also, it can be used to change default Capstone names.
|
protected |
Register number to register LLVM type. It does not look like Capstone provides type information for registers, so all registers need to be manually mapped here.
|
protected |
|
protected |
|
protected |
Set of Capstone instruction IDs translation of which would produce return pseudo call.
|
protected |
|
protected |
|
protected |
|
protected |