retdec
mips_impl.h
Go to the documentation of this file.
1 
7 #ifndef CAPSTONE2LLVMIR_MIPS_MIPS_IMPL_H
8 #define CAPSTONE2LLVMIR_MIPS_MIPS_IMPL_H
9 
12 
13 namespace retdec {
14 namespace capstone2llvmir {
15 
17  public Capstone2LlvmIrTranslator_impl<cs_mips, cs_mips_op>,
19 {
20  public:
22  llvm::Module* m,
23  cs_mode basic = CS_MODE_MIPS32,
24  cs_mode extra = CS_MODE_LITTLE_ENDIAN);
25 //
26 //==============================================================================
27 // Mode query & modification methods - from Capstone2LlvmIrTranslator.
28 //==============================================================================
29 //
30  public:
31  virtual bool isAllowedBasicMode(cs_mode m) override;
32  virtual bool isAllowedExtraMode(cs_mode m) override;
33  virtual uint32_t getArchByteSize() override;
34 //
35 //==============================================================================
36 // Capstone related getters - from Capstone2LlvmIrTranslator.
37 //==============================================================================
38 //
39  public:
40  virtual bool hasDelaySlot(uint32_t id) const override;
41  virtual bool hasDelaySlotTypical(uint32_t id) const override;
42  virtual bool hasDelaySlotLikely(uint32_t id) const override;
43  virtual std::size_t getDelaySlot(uint32_t id) const override;
44 //
45 //==============================================================================
46 // Pure virtual methods from Capstone2LlvmIrTranslator_impl
47 //==============================================================================
48 //
49  protected:
50  virtual void initializeArchSpecific() override;
51  virtual void initializeRegNameMap() override;
52  virtual void initializeRegTypeMap() override;
53  virtual void initializePseudoCallInstructionIDs() override;
54  virtual void generateEnvironmentArchSpecific() override;
55  virtual void generateDataLayout() override;
56  virtual void generateRegisters() override;
57  virtual uint32_t getCarryRegister() override;
58 
59  virtual void translateInstruction(
60  cs_insn* i,
61  llvm::IRBuilder<>& irb) override;
62 //
63 //==============================================================================
64 // MIPS-specific methods.
65 //==============================================================================
66 //
67  protected:
68  llvm::Value* getCurrentPc(cs_insn* i);
69  llvm::Value* getNextNextInsnAddress(cs_insn* i);
70  llvm::Value* getUnpredictableValue();
71 
72  uint32_t singlePrecisionToDoublePrecisionFpRegister(uint32_t r) const;
73 
74  virtual llvm::Value* loadRegister(
75  uint32_t r,
76  llvm::IRBuilder<>& irb,
77  llvm::Type* dstType = nullptr,
78  eOpConv ct = eOpConv::THROW) override;
79  virtual llvm::Value* loadOp(
80  cs_mips_op& op,
81  llvm::IRBuilder<>& irb,
82  llvm::Type* ty = nullptr,
83  bool lea = false) override;
84 
85  virtual llvm::StoreInst* storeRegister(
86  uint32_t r,
87  llvm::Value* val,
88  llvm::IRBuilder<>& irb,
89  eOpConv ct = eOpConv::SEXT_TRUNC_OR_BITCAST) override;
90  virtual llvm::Instruction* storeOp(
91  cs_mips_op& op,
92  llvm::Value* val,
93  llvm::IRBuilder<>& irb,
94  eOpConv ct = eOpConv::SEXT_TRUNC_OR_BITCAST) override;
95 
96  llvm::StoreInst* storeRegisterUnpredictable(
97  uint32_t r,
98  llvm::IRBuilder<>& irb);
99  bool isFpInstructionVariant(cs_insn* i);
100 
101  virtual bool isOperandRegister(cs_mips_op& op) override;
102  bool isGeneralPurposeRegister(uint32_t r);
103 //
104 //==============================================================================
105 // MIPS implementation data.
106 //==============================================================================
107 //
108  protected:
109  static std::map<
110  std::size_t,
112  cs_insn* i,
113  cs_mips*,
114  llvm::IRBuilder<>&)> _i2fm;
115 //
116 //==============================================================================
117 // MIPS instruction translation methods.
118 //==============================================================================
119 //
120  protected:
121  void translateAdd(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
122  void translateAnd(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
123  void translateBc1f(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
124  void translateBc1t(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
125  void translateBcondal(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
126  void translateBreak(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
127  void translateC(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
128  void translateClo(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
129  void translateClz(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
130  void translateCondBranchTernary(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
131  void translateCondBranchBinary(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
132  void translateCvt(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
133  void translateDiv(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
134  void translateDivu(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
135  void translateExt(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
136  void translateJ(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
137  void translateJal(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
138  void translateLoadMemory(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
139  void translateLui(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
140  void translateMadd(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
141  void translateMaddf(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
142  void translateMax(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
143  void translateMfc1(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
144  void translateMfhi(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
145  void translateMflo(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
146  void translateMin(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
147  void translateMov(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
148  void translateMsub(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
149  void translateMsubf(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
150  void translateMtc1(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
151  void translateMthi(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
152  void translateMtlo(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
153  void translateMovf(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
154  void translateMovn(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
155  void translateMovt(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
156  void translateMovz(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
157  void translateMul(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
158  void translateMult(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
159  void translateNeg(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
160  void translateNegu(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
161  void translateNmadd(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
162  void translateNmsub(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
163  void translateNop(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
164  void translateNor(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
165  void translateNot(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
166  void translateOr(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
167  void translateRotr(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
168  void translateSeb(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
169  void translateSeh(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
170  void translateSeq(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
171  void translateSll(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
172  void translateSlt(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
173  void translateSltu(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
174  void translateSne(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
175  void translateSra(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
176  void translateSrl(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
177  void translateStoreMemory(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
178  void translateSub(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
179  void translateSyscall(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
180  void translateXor(cs_insn* i, cs_mips* mi, llvm::IRBuilder<>& irb);
181 };
182 
183 } // namespace capstone2llvmir
184 } // namespace retdec
185 
186 #endif
MIPS specialization of translator's abstract public interface.
Common private implementation for translators converting bytes to LLVM IR.
void translateSub(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1739
void translateBcondal(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:575
void translateJ(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1026
void translateBreak(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:765
void translateSne(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1792
void translateMsub(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1357
virtual llvm::Value * loadRegister(uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW) override
Definition: mips.cpp:270
void translateClz(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:918
virtual llvm::StoreInst * storeRegister(uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST) override
Definition: mips.cpp:369
llvm::Value * getCurrentPc(cs_insn *i)
Definition: mips.cpp:189
uint32_t singlePrecisionToDoublePrecisionFpRegister(uint32_t r) const
Definition: mips.cpp:222
virtual bool isAllowedBasicMode(cs_mode m) override
Definition: mips.cpp:32
void translateAdd(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:499
virtual void translateInstruction(cs_insn *i, llvm::IRBuilder<> &irb) override
Definition: mips.cpp:161
void translateMul(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1531
void translateDivu(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:960
void translateMadd(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1138
void translateMin(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1333
void translateMtlo(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1468
void translateJal(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1038
void translateCvt(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:605
void translateMovt(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1505
void translateCondBranchTernary(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:690
void translateMaddf(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1204
virtual void generateDataLayout() override
Definition: mips.cpp:128
void translateNegu(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1239
void translateMult(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1553
void translateMovf(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1479
llvm::StoreInst * storeRegisterUnpredictable(uint32_t r, llvm::IRBuilder<> &irb)
Definition: mips.cpp:409
void translateC(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:816
llvm::Value * getNextNextInsnAddress(cs_insn *i)
Definition: mips.cpp:200
llvm::Value * getUnpredictableValue()
Definition: mips.cpp:217
void translateMflo(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1322
void translateSll(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1677
void translateBc1t(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:546
void translateMthi(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1457
virtual void initializeArchSpecific() override
Definition: mips_init.cpp:18
void translateAnd(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:513
void translateNmsub(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1439
bool isGeneralPurposeRegister(uint32_t r)
Definition: mips.cpp:485
void translateRotr(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1629
virtual void initializeRegNameMap() override
Definition: mips_init.cpp:23
bool isFpInstructionVariant(cs_insn *i)
Definition: mips.cpp:471
virtual bool hasDelaySlotLikely(uint32_t id) const override
Definition: mips.cpp:81
void translateLoadMemory(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1054
void translateNop(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1584
void translateMovn(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1492
virtual void initializePseudoCallInstructionIDs() override
Definition: mips_init.cpp:254
void translateSeb(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1645
void translateSltu(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1702
virtual void initializeRegTypeMap() override
Definition: mips_init.cpp:50
virtual bool hasDelaySlot(uint32_t id) const override
Definition: mips.cpp:71
void translateMfhi(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1311
void translateClo(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:901
virtual std::size_t getDelaySlot(uint32_t id) const override
Definition: mips.cpp:96
void translateSeq(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1805
void translateMov(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1346
Capstone2LlvmIrTranslatorMips_impl(llvm::Module *m, cs_mode basic=CS_MODE_MIPS32, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
Definition: mips.cpp:14
void translateNot(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1605
void translateMfc1(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1282
void translateExt(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:974
void translateStoreMemory(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1085
void translateMsubf(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1423
void translateSeh(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1661
virtual bool isAllowedExtraMode(cs_mode m) override
Definition: mips.cpp:40
void translateSyscall(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1753
virtual void generateEnvironmentArchSpecific() override
Definition: mips.cpp:123
void translateMax(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1269
void translateMovz(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1518
virtual uint32_t getArchByteSize() override
Definition: mips.cpp:47
void translateSra(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1715
void translateNeg(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1220
static std::map< std::size_t, void(Capstone2LlvmIrTranslatorMips_impl::*)(cs_insn *i, cs_mips *, llvm::IRBuilder<> &)> _i2fm
Definition: mips_impl.h:114
virtual llvm::Instruction * storeOp(cs_mips_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST) override
Definition: mips.cpp:422
void translateBc1f(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:525
virtual uint32_t getCarryRegister() override
Definition: mips.cpp:156
virtual bool isOperandRegister(cs_mips_op &op) override
Definition: mips.cpp:480
virtual bool hasDelaySlotTypical(uint32_t id) const override
Definition: mips.cpp:76
void translateOr(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1617
virtual llvm::Value * loadOp(cs_mips_op &op, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr, bool lea=false) override
Definition: mips.cpp:309
void translateXor(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1779
void translateNor(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1592
void translateSrl(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1727
void translateLui(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1125
void translateCondBranchBinary(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:723
void translateSlt(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1689
void translateNmadd(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1251
void translateDiv(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:934
void translateMtc1(cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
Definition: mips.cpp:1298
virtual void generateRegisters() override
Definition: mips.cpp:148
Definition: capstone2llvmir_impl.h:32
Definition: archive_wrapper.h:19