retdec
Public Member Functions | Protected Member Functions | Static Protected Attributes | List of all members
retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl Class Reference

#include <mips_impl.h>

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Collaboration diagram for retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl:
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Public Member Functions

 Capstone2LlvmIrTranslatorMips_impl (llvm::Module *m, cs_mode basic=CS_MODE_MIPS32, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
virtual bool isAllowedBasicMode (cs_mode m) override
 
virtual bool isAllowedExtraMode (cs_mode m) override
 
virtual uint32_t getArchByteSize () override
 
virtual bool hasDelaySlot (uint32_t id) const override
 
virtual bool hasDelaySlotTypical (uint32_t id) const override
 
virtual bool hasDelaySlotLikely (uint32_t id) const override
 
virtual std::size_t getDelaySlot (uint32_t id) const override
 
- Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >
 Capstone2LlvmIrTranslator_impl (cs_arch a, cs_mode basic, cs_mode extra, llvm::Module *m)
 
virtual ~Capstone2LlvmIrTranslator_impl ()
 
virtual void setIgnoreUnexpectedOperands (bool f) override
 
virtual void setIgnoreUnhandledInstructions (bool f) override
 
virtual void setGeneratePseudoAsmFunctions (bool f) override
 
virtual bool isIgnoreUnexpectedOperands () const override
 
virtual bool isIgnoreUnhandledInstructions () const override
 
virtual bool isGeneratePseudoAsmFunctions () const override
 
virtual void modifyBasicMode (cs_mode m) override
 
virtual void modifyExtraMode (cs_mode m) override
 
virtual uint32_t getArchBitSize () override
 
virtual TranslationResult translate (const uint8_t *bytes, std::size_t size, retdec::common::Address a, llvm::IRBuilder<> &irb, std::size_t count=0, bool stopOnBranch=false) override
 
virtual TranslationResultOne translateOne (const uint8_t *&bytes, std::size_t &size, retdec::common::Address &a, llvm::IRBuilder<> &irb) override
 
virtual const csh & getCapstoneEngine () const override
 
virtual cs_arch getArchitecture () const override
 
virtual cs_mode getBasicMode () const override
 
virtual cs_mode getExtraMode () const override
 
virtual llvm::GlobalVariable * getRegister (uint32_t r) override
 
virtual std::string getRegisterName (uint32_t r) const override
 
virtual uint32_t getRegisterBitSize (uint32_t r) const override
 
virtual uint32_t getRegisterByteSize (uint32_t r) const override
 
virtual llvm::Type * getRegisterType (uint32_t r) const override
 
virtual bool isControlFlowInstruction (cs_insn &i) const override
 
virtual bool isCallInstruction (cs_insn &i) const override
 
virtual bool isReturnInstruction (cs_insn &i) const override
 
virtual bool isBranchInstruction (cs_insn &i) const override
 
virtual bool isCondBranchInstruction (cs_insn &i) const override
 
virtual llvm::Module * getModule () const override
 
virtual bool isSpecialAsm2LlvmMapGlobal (llvm::Value *v) const override
 
virtual llvm::StoreInst * isSpecialAsm2LlvmInstr (llvm::Value *v) const override
 
virtual llvm::GlobalVariable * getAsm2LlvmMapGlobalVariable () const override
 
virtual bool isCallFunction (llvm::Function *f) const override
 
virtual bool isCallFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionCallFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getCallFunction () const override
 
virtual bool isReturnFunction (llvm::Function *f) const override
 
virtual bool isReturnFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionReturnFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getReturnFunction () const override
 
virtual bool isBranchFunction (llvm::Function *f) const override
 
virtual bool isBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getBranchFunction () const override
 
virtual bool isCondBranchFunction (llvm::Function *f) const override
 
virtual bool isCondBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionCondBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getCondBranchFunction () const override
 
virtual bool isAnyPseudoFunction (llvm::Function *f) const override
 
virtual bool isAnyPseudoFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::GlobalVariable * isRegister (llvm::Value *v) const override
 
virtual uint32_t getCapstoneRegister (llvm::GlobalVariable *gv) const override
 
virtual bool isPseudoAsmFunction (llvm::Function *f) const override
 
virtual bool isPseudoAsmFunctionCall (llvm::CallInst *c) const override
 
virtual const std::set< llvm::Function * > & getPseudoAsmFunctions () const override
 
- Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator
virtual ~Capstone2LlvmIrTranslator ()=default
 

Protected Member Functions

virtual void initializeArchSpecific () override
 
virtual void initializeRegNameMap () override
 
virtual void initializeRegTypeMap () override
 
virtual void initializePseudoCallInstructionIDs () override
 
virtual void generateEnvironmentArchSpecific () override
 
virtual void generateDataLayout () override
 
virtual void generateRegisters () override
 
virtual uint32_t getCarryRegister () override
 
virtual void translateInstruction (cs_insn *i, llvm::IRBuilder<> &irb) override
 
llvm::Value * getCurrentPc (cs_insn *i)
 
llvm::Value * getNextNextInsnAddress (cs_insn *i)
 
llvm::Value * getUnpredictableValue ()
 
uint32_t singlePrecisionToDoublePrecisionFpRegister (uint32_t r) const
 
virtual llvm::Value * loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW) override
 
virtual llvm::Value * loadOp (cs_mips_op &op, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr, bool lea=false) override
 
virtual llvm::StoreInst * storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST) override
 
virtual llvm::Instruction * storeOp (cs_mips_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST) override
 
llvm::StoreInst * storeRegisterUnpredictable (uint32_t r, llvm::IRBuilder<> &irb)
 
bool isFpInstructionVariant (cs_insn *i)
 
virtual bool isOperandRegister (cs_mips_op &op) override
 
bool isGeneralPurposeRegister (uint32_t r)
 
void translateAdd (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateAnd (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateBc1f (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateBc1t (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateBcondal (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateBreak (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateC (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateClo (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateClz (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateCondBranchTernary (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateCondBranchBinary (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateCvt (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateDiv (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateDivu (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateExt (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateJ (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateJal (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateLoadMemory (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateLui (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMadd (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMaddf (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMax (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMfc1 (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMfhi (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMflo (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMin (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMov (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMsub (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMsubf (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMtc1 (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMthi (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMtlo (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMovf (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMovn (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMovt (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMovz (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMul (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateMult (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNeg (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNegu (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNmadd (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNmsub (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNop (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNor (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateNot (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateOr (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateRotr (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSeb (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSeh (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSeq (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSll (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSlt (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSltu (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSne (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSra (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSrl (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateStoreMemory (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSub (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateSyscall (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
void translateXor (cs_insn *i, cs_mips *mi, llvm::IRBuilder<> &irb)
 
- Protected Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >
llvm::Value * generateTypeConversion (llvm::IRBuilder<> &irb, llvm::Value *from, llvm::Type *to, eOpConv ct)
 
llvm::Type * _checkTypeConversion (llvm::IRBuilder<> &irb, llvm::Type *to, eOpConv ct)
 
virtual void initialize ()
 
virtual void openHandle ()
 
virtual void configureHandle ()
 
virtual void closeHandle ()
 
virtual void generateEnvironment ()
 
virtual void generateSpecialAsm2LlvmMapGlobal ()
 
virtual llvm::StoreInst * generateSpecialAsm2LlvmInstr (llvm::IRBuilder<> &irb, cs_insn *i)
 
virtual void generateCallFunction ()
 
virtual llvm::CallInst * generateCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual llvm::CallInst * generateCondCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual void generateReturnFunction ()
 
virtual llvm::CallInst * generateReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual llvm::CallInst * generateCondReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual void generateBranchFunction ()
 
virtual llvm::CallInst * generateBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual void generateCondBranchFunction ()
 
virtual llvm::CallInst * generateCondBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual llvm::GlobalVariable * createRegister (uint32_t r, llvm::GlobalValue::LinkageTypes lt=llvm::GlobalValue::LinkageTypes::InternalLinkage, llvm::Constant *initializer=nullptr)
 
virtual llvm::Value * loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW)=0
 
llvm::Value * loadOp (cs_mips *ci, llvm::IRBuilder<> &irb, std::size_t idx, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
virtual llvm::Instruction * storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0
 
virtual llvm::Instruction * storeOp (cs_mips_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0
 
std::vector< llvm::Value * > _loadOps (cs_mips *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
std::vector< llvm::Value * > _loadOpsUniversal (cs_mips *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, eOpConv ict=eOpConv::SEXT_TRUNC_OR_BITCAST, eOpConv fct=eOpConv::FPCAST_OR_BITCAST)
 
llvm::Value * loadOpUnary (cs_mips *ci, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, llvm::Type *loadType=nullptr, eOpConv ct=eOpConv::THROW)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_mips *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_mips *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_mips *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
llvm::Value * loadOpBinaryOp0 (cs_mips *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr)
 
llvm::Value * loadOpBinaryOp1 (cs_mips *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_mips *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_mips *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_mips *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinaryOrTernaryOp1Op2 (cs_mips *ai, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinaryOrTernaryOp1Op2 (cs_mips *ai, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpQuaternaryOp1Op2Op3 (cs_mips *ai, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAdd (llvm::Value *add, llvm::Value *op0, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAddC (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateCarryAddInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAddCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateOverflowAdd (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateOverflowAddC (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateOverflowSub (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateOverflowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateBorrowSub (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateBorrowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateBorrowSubInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateBorrowSubCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::IntegerType * getDefaultType ()
 
llvm::Value * getThisInsnAddress (cs_insn *i)
 
llvm::Value * getNextInsnAddress (cs_insn *i)
 
llvm::BranchInst * getCondBranchForInsnInIfThen (llvm::Instruction *i) const
 
std::string getPseudoAsmFunctionName (cs_insn *insn)
 
llvm::Function * getPseudoAsmFunction (cs_insn *insn, llvm::FunctionType *type, const std::string &name="")
 
llvm::Function * getPseudoAsmFunction (cs_insn *insn, llvm::Type *retType, llvm::ArrayRef< llvm::Type * > params, const std::string &name="")
 
void translatePseudoAsmOp0Fnc (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1Op2 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1Op2 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1Op2 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1Op2Op3 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1Op2Op3 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1Op2Op3 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0Op1FncOp0Op1Op2Op3 (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
virtual uint8_t getOperandAccess (cs_mips_op &op)
 
virtual void translatePseudoAsmGeneric (cs_insn *i, cs_mips *ci, llvm::IRBuilder<> &irb)
 
void throwUnexpectedOperands (cs_insn *i, const std::string comment="")
 
void throwUnhandledInstructions (cs_insn *i, const std::string comment="")
 

Static Protected Attributes

static std::map< std::size_t, void(Capstone2LlvmIrTranslatorMips_impl::*)(cs_insn *i, cs_mips *, llvm::IRBuilder<> &)> _i2fm
 

Additional Inherited Members

- Static Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArch (cs_arch a, llvm::Module *m, cs_mode basic=CS_MODE_LITTLE_ENDIAN, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArm (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateThumb (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArm64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips3 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips32R6 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_16 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpc32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpc64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpcQpx (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateSparc (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateSysz (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateXcore (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
- Protected Types inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >
enum class  eOpConv
 
- Protected Attributes inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >
csh _handle
 
cs_arch _arch
 
cs_mode _basicMode
 
cs_mode _extraMode
 
cs_mode _origBasicMode
 
llvm::Module * _module
 
llvm::GlobalVariable * _asm2llvmGv
 
llvm::Function * _callFunction
 
llvm::Function * _returnFunction
 
llvm::Function * _branchFunction
 
llvm::Function * _condBranchFunction
 
llvm::GlobalValue::LinkageTypes _regLt
 
std::map< std::pair< std::string, llvm::FunctionType * >, llvm::Function * > _insn2asmFunctions
 (fnc_name, fnc_type) -> fnc More...
 
std::set< llvm::Function * > _asmFunctions
 
std::map< uint32_t, std::string > _reg2name
 
std::map< uint32_t, llvm::Type * > _reg2type
 
std::map< llvm::GlobalVariable *, uint32_t > _llvm2CapstoneRegs
 
std::map< uint32_t, llvm::GlobalVariable * > _capstone2LlvmRegs
 
llvm::CallInst * _branchGenerated
 
bool _inCondition
 
llvm::Value * op0
 
llvm::Value * op1
 
llvm::Value * op2
 
llvm::Value * op3
 
cs_insn * _insn
 Capstone instruction being currently translated. More...
 
std::set< unsigned int > _callInsnIds
 
std::set< unsigned int > _returnInsnIds
 
std::set< unsigned int > _branchInsnIds
 
std::set< unsigned int > _condBranchInsnIds
 
std::set< unsigned int > _controlFlowInsnIds
 
bool _ignoreUnexpectedOperands
 
bool _ignoreUnhandledInstructions
 
bool _generatePseudoAsmFunctions
 

Constructor & Destructor Documentation

◆ Capstone2LlvmIrTranslatorMips_impl()

retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::Capstone2LlvmIrTranslatorMips_impl ( llvm::Module *  m,
cs_mode  basic = CS_MODE_MIPS32,
cs_mode  extra = CS_MODE_LITTLE_ENDIAN 
)

Member Function Documentation

◆ generateDataLayout()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::generateDataLayout ( )
overrideprotectedvirtual

Generate LLVM data layout into the module. This is architecture and mode specific and must be implemented in concrete classes.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ generateEnvironmentArchSpecific()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::generateEnvironmentArchSpecific ( )
overrideprotectedvirtual

Generate architecture specific environment on top of common environment generated by generateEnvironment().

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ generateRegisters()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::generateRegisters ( )
overrideprotectedvirtual

Generate LLVM global variables for registers. This is architecture and mode specific and must be implemented in concrete classes.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ getArchByteSize()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::getArchByteSize ( )
overridevirtual
Returns
Architecture byte size according to the currently set basic mode.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ getCarryRegister()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::getCarryRegister ( )
overrideprotectedvirtual

◆ getCurrentPc()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::getCurrentPc ( cs_insn *  i)
protected

◆ getDelaySlot()

std::size_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::getDelaySlot ( uint32_t  id) const
overridevirtual

At the moment, all instructions here have delay slot of size 1. If there are some instructions with different sized slots, we will need map.

Reimplemented from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ getNextNextInsnAddress()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::getNextNextInsnAddress ( cs_insn *  i)
protected

MIPS specifications often says something like: "The return link is the address of the second instruction following the, branch, at which location execution continues after a procedure call." This method returns this address as an LLVM ConstantInt.

◆ getUnpredictableValue()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::getUnpredictableValue ( )
protected
Returns
Nullptr – there is no value.

Nullptr will cause all the consumers like storeRegisterUnpredictable() not to generate any code that depends on unpredictable value.

MIPS specifications says: "... Software can never depend on results that are UNPREDICTABLE. UNPREDICTABLE operations may cause a result to be generated or not. ..."

Right now, we choose not to generate it. This may change in future.

◆ hasDelaySlot()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::hasDelaySlot ( uint32_t  id) const
overridevirtual

Has the specified Capstone instruction id any kind of delay slot?

Reimplemented from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ hasDelaySlotLikely()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::hasDelaySlotLikely ( uint32_t  id) const
overridevirtual

Has the specified Capstone instruction id likely delay slot?

Reimplemented from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ hasDelaySlotTypical()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::hasDelaySlotTypical ( uint32_t  id) const
overridevirtual

Has the specified Capstone instruction id typical delay slot?

Reimplemented from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ initializeArchSpecific()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::initializeArchSpecific ( )
overrideprotectedvirtual

Do architecture and mode specific initialization on top of common initialization done by initialize();

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ initializePseudoCallInstructionIDs()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::initializePseudoCallInstructionIDs ( )
overrideprotectedvirtual

If possible, initialize _callInsnIds, _returnInsnIds, _branchInsnIds, _condBranchInsnIds, _condBranchInsnIds sets.

For some architectures, it is not possible to initialize all the instructions that may generate control flow change. E.g. Any kind of ARM instruction that writes to PC is changing control flow.

This is not ideal, because each time some instruction that generates one of these is added, or removed, its ID must also be manualy added, or removed, here. This could be easily forgotten. Right now, I do not know how to solve this better (i.e. automatic update).

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ initializeRegNameMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::initializeRegNameMap ( )
overrideprotectedvirtual

Initialize _reg2name. See comment for _reg2name to know what must be initialized, and what may or may not be initialized.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ initializeRegTypeMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::initializeRegTypeMap ( )
overrideprotectedvirtual

Initialize _reg2type. See comment for _reg2type to know what must be initialized, and what may or may not be initialized.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ isAllowedBasicMode()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::isAllowedBasicMode ( cs_mode  m)
overridevirtual

Check if mode m is an allowed basic mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.

Returns
True if mode is allowed, false otherwise.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ isAllowedExtraMode()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::isAllowedExtraMode ( cs_mode  m)
overridevirtual

Check if mode m is an allowed extra mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.

Returns
True if mode is allowed, false otherwise.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ isFpInstructionVariant()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::isFpInstructionVariant ( cs_insn *  i)
protected

◆ isGeneralPurposeRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::isGeneralPurposeRegister ( uint32_t  r)
protected

◆ isOperandRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::isOperandRegister ( cs_mips_op &  op)
overrideprotectedvirtual

◆ loadOp()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::loadOp ( cs_mips_op &  op,
llvm::IRBuilder<> &  irb,
llvm::Type *  ty = nullptr,
bool  lea = false 
)
overrideprotectedvirtual

◆ loadRegister()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::loadRegister ( uint32_t  r,
llvm::IRBuilder<> &  irb,
llvm::Type *  dstType = nullptr,
eOpConv  ct = eOpConv::THROW 
)
overrideprotectedvirtual

◆ singlePrecisionToDoublePrecisionFpRegister()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::singlePrecisionToDoublePrecisionFpRegister ( uint32_t  r) const
protected

◆ storeOp()

llvm::Instruction * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::storeOp ( cs_mips_op &  op,
llvm::Value *  val,
llvm::IRBuilder<> &  irb,
eOpConv  ct = eOpConv::SEXT_TRUNC_OR_BITCAST 
)
overrideprotectedvirtual

ct is used when storing a value to register with a different type. When storing to memory, value type is used – therefore it needs to be converted to the desired type prior to storeOp() call.

◆ storeRegister()

llvm::StoreInst * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::storeRegister ( uint32_t  r,
llvm::Value *  val,
llvm::IRBuilder<> &  irb,
eOpConv  ct = eOpConv::SEXT_TRUNC_OR_BITCAST 
)
overrideprotectedvirtual

◆ storeRegisterUnpredictable()

llvm::StoreInst * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::storeRegisterUnpredictable ( uint32_t  r,
llvm::IRBuilder<> &  irb 
)
protected

Store unpredictable value to register r. No store is generated if unpredictable value is set to nullptr (see getUnpredictableValue()).

◆ translateAdd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateAdd ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_ADDI, MIPS_INS_ADDIU, MIPS_INS_ADD, MIPS_INS_ADDU

◆ translateAnd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateAnd ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_AND, MIPS_INS_ANDI

◆ translateBc1f()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateBc1f ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_BC1F, MIPS_INS_BC1FL

◆ translateBc1t()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateBc1t ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_BC1T, MIPS_INS_BC1TL

◆ translateBcondal()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateBcondal ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_BGEZAL (and link), MIPS_INS_BGEZALL (and link likely – executes the delay slot only if the branch is taken). Bodies are the same, but delay slot eecution differs:

  • MIPS_INS_BGEZAL: delay slot always executed -> should be moved before jump.
  • MIPS_INS_BGEZALL: delay slot execution only if jump taken -> should be moved to branch target.

The same for: MIPS_INS_BLTZAL, MIPS_INS_BLTZALL

◆ translateBreak()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateBreak ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_BREAK

◆ translateC()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateC ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_C

◆ translateClo()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateClo ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_CLO

◆ translateClz()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateClz ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_CLZ

◆ translateCondBranchBinary()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateCondBranchBinary ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_BLEZ, MIPS_INS_BLEZL (likely) MIPS_INS_BGTZ, MIPS_INS_BGTZL (likely) MIPS_INS_BLTZ, MIPS_INS_BLTZL (likely) MIPS_INS_BGEZ, MIPS_INS_BGEZL (likely) MIPS_INS_BEQZ MIPS_INS_BNEZ

◆ translateCondBranchTernary()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateCondBranchTernary ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_BEQ, MIPS_INS_BEQL (likely) MIPS_INS_BNE, MIPS_INS_BNEL (likely)

◆ translateCvt()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateCvt ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_CVT

◆ translateDiv()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateDiv ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_DIV

◆ translateDivu()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateDivu ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_DIVU

◆ translateExt()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateExt ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_EXT

◆ translateInstruction()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateInstruction ( cs_insn *  i,
llvm::IRBuilder<> &  irb 
)
overrideprotectedvirtual

Translate single Capstone instruction.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_mips, cs_mips_op >.

◆ translateJ()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateJ ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_J, MIPS_INS_JR, MIPS_INS_B,

◆ translateJal()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateJal ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_JAL, MIPS_INS_JALR, MIPS_INS_BAL

◆ translateLoadMemory()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateLoadMemory ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_LB, MIPS_INS_LBU, MIPS_INS_LH, MIPS_INS_LHU, MIPS_INS_LW, MIPS_INS_LWU, MIPS_INS_LD, MIPS_INS_LDC3, MIPS_INS_LWC1, MIPS_INS_LDC1

◆ translateLui()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateLui ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_LUI This behaves like 32-bit MIPS instruction even on 64-bit MIPS.

◆ translateMadd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMadd ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MADD, MIPS_INS_MADDU

◆ translateMaddf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMaddf ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

◆ translateMax()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMax ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MAX

◆ translateMfc1()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMfc1 ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MFC1

◆ translateMfhi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMfhi ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MFHI

◆ translateMflo()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMflo ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MFLO

◆ translateMin()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMin ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MIN

◆ translateMov()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMov ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MOV, MIPS_INS_MOVE

◆ translateMovf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMovf ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MOVF

◆ translateMovn()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMovn ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MOVN

◆ translateMovt()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMovt ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MOVT

◆ translateMovz()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMovz ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MOVZ

◆ translateMsub()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMsub ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MSUB, MIPS_INS_MSUBU

◆ translateMsubf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMsubf ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

◆ translateMtc1()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMtc1 ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MTC1

◆ translateMthi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMthi ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MTHI

◆ translateMtlo()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMtlo ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MTLO

◆ translateMul()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMul ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MUL

◆ translateMult()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateMult ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_MULT, MIPS_INS_MULTU

◆ translateNeg()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNeg ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NEG

◆ translateNegu()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNegu ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NEGU

◆ translateNmadd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNmadd ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NMADD – this could be merged with translateMaddf().

◆ translateNmsub()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNmsub ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NMSUB

◆ translateNop()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNop ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NOP

◆ translateNor()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNor ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NOR, MIPS_INS_NORI

◆ translateNot()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateNot ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_NOT

◆ translateOr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateOr ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_OR, MIPS_INS_ORI

◆ translateRotr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateRotr ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_ROTR, MIPS_INS_ROTRV

◆ translateSeb()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSeb ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SEB

◆ translateSeh()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSeh ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SEH

◆ translateSeq()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSeq ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SEQ, MIPS_INS_SEQI op0 = (op1 != op2) ? 1 : 0

◆ translateSll()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSll ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SLL, MIPS_INS_SLLI, MIPS_INS_SLLV

◆ translateSlt()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSlt ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SLT, MIPS_INS_SLTI

◆ translateSltu()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSltu ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SLTU, MIPS_INS_SLTIU

◆ translateSne()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSne ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SNE, MIPS_INS_SNEI op0 = (op1 != op2) ? 1 : 0

◆ translateSra()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSra ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SRA, MIPS_INS_SRAI, MIPS_INS_SRAV

◆ translateSrl()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSrl ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SRL, MIPS_INS_SRLI, MIPS_INS_SRLV

◆ translateStoreMemory()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateStoreMemory ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SB, MIPS_INS_SH, MIPS_INS_SW, MIPS_INS_SD, MIPS_INS_SDC3, MIPS_INS_SWC1, MIPS_INS_SDC1

◆ translateSub()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSub ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SUB, MIPS_INS_SUBU

◆ translateSyscall()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateSyscall ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_SYSCALL

◆ translateXor()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::translateXor ( cs_insn *  i,
cs_mips *  mi,
llvm::IRBuilder<> &  irb 
)
protected

MIPS_INS_XOR, MIPS_INS_XORI

Member Data Documentation

◆ _i2fm

std::map< std::size_t, void(Capstone2LlvmIrTranslatorMips_impl::*)(cs_insn *i, cs_mips *, llvm::IRBuilder<> &)> retdec::capstone2llvmir::Capstone2LlvmIrTranslatorMips_impl::_i2fm
staticprotected

The documentation for this class was generated from the following files: