retdec
Public Member Functions | Protected Types | Protected Member Functions | Protected Attributes | Static Protected Attributes | List of all members
retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl Class Reference

#include <arm64_impl.h>

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Collaboration diagram for retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl:
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Public Member Functions

 Capstone2LlvmIrTranslatorArm64_impl (llvm::Module *m, cs_mode basic=CS_MODE_ARM, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
virtual bool isAllowedBasicMode (cs_mode m) override
 
virtual bool isAllowedExtraMode (cs_mode m) override
 
virtual uint32_t getArchByteSize () override
 
virtual uint32_t getParentRegister (uint32_t r) const override
 
- Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >
 Capstone2LlvmIrTranslator_impl (cs_arch a, cs_mode basic, cs_mode extra, llvm::Module *m)
 
virtual ~Capstone2LlvmIrTranslator_impl ()
 
virtual void setIgnoreUnexpectedOperands (bool f) override
 
virtual void setIgnoreUnhandledInstructions (bool f) override
 
virtual void setGeneratePseudoAsmFunctions (bool f) override
 
virtual bool isIgnoreUnexpectedOperands () const override
 
virtual bool isIgnoreUnhandledInstructions () const override
 
virtual bool isGeneratePseudoAsmFunctions () const override
 
virtual void modifyBasicMode (cs_mode m) override
 
virtual void modifyExtraMode (cs_mode m) override
 
virtual uint32_t getArchBitSize () override
 
virtual TranslationResult translate (const uint8_t *bytes, std::size_t size, retdec::common::Address a, llvm::IRBuilder<> &irb, std::size_t count=0, bool stopOnBranch=false) override
 
virtual TranslationResultOne translateOne (const uint8_t *&bytes, std::size_t &size, retdec::common::Address &a, llvm::IRBuilder<> &irb) override
 
virtual const csh & getCapstoneEngine () const override
 
virtual cs_arch getArchitecture () const override
 
virtual cs_mode getBasicMode () const override
 
virtual cs_mode getExtraMode () const override
 
virtual bool hasDelaySlot (uint32_t id) const override
 
virtual bool hasDelaySlotTypical (uint32_t id) const override
 
virtual bool hasDelaySlotLikely (uint32_t id) const override
 
virtual std::size_t getDelaySlot (uint32_t id) const override
 
virtual llvm::GlobalVariable * getRegister (uint32_t r) override
 
virtual std::string getRegisterName (uint32_t r) const override
 
virtual uint32_t getRegisterBitSize (uint32_t r) const override
 
virtual uint32_t getRegisterByteSize (uint32_t r) const override
 
virtual llvm::Type * getRegisterType (uint32_t r) const override
 
virtual bool isControlFlowInstruction (cs_insn &i) const override
 
virtual bool isCallInstruction (cs_insn &i) const override
 
virtual bool isReturnInstruction (cs_insn &i) const override
 
virtual bool isBranchInstruction (cs_insn &i) const override
 
virtual bool isCondBranchInstruction (cs_insn &i) const override
 
virtual llvm::Module * getModule () const override
 
virtual bool isSpecialAsm2LlvmMapGlobal (llvm::Value *v) const override
 
virtual llvm::StoreInst * isSpecialAsm2LlvmInstr (llvm::Value *v) const override
 
virtual llvm::GlobalVariable * getAsm2LlvmMapGlobalVariable () const override
 
virtual bool isCallFunction (llvm::Function *f) const override
 
virtual bool isCallFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionCallFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getCallFunction () const override
 
virtual bool isReturnFunction (llvm::Function *f) const override
 
virtual bool isReturnFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionReturnFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getReturnFunction () const override
 
virtual bool isBranchFunction (llvm::Function *f) const override
 
virtual bool isBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getBranchFunction () const override
 
virtual bool isCondBranchFunction (llvm::Function *f) const override
 
virtual bool isCondBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::BranchInst * isInConditionCondBranchFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::Function * getCondBranchFunction () const override
 
virtual bool isAnyPseudoFunction (llvm::Function *f) const override
 
virtual bool isAnyPseudoFunctionCall (llvm::CallInst *c) const override
 
virtual llvm::GlobalVariable * isRegister (llvm::Value *v) const override
 
virtual uint32_t getCapstoneRegister (llvm::GlobalVariable *gv) const override
 
virtual bool isPseudoAsmFunction (llvm::Function *f) const override
 
virtual bool isPseudoAsmFunctionCall (llvm::CallInst *c) const override
 
virtual const std::set< llvm::Function * > & getPseudoAsmFunctions () const override
 
- Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator
virtual ~Capstone2LlvmIrTranslator ()=default
 

Protected Types

using _translator_fnc = void(Capstone2LlvmIrTranslatorArm64_impl::*)(cs_insn *i, cs_arm64 *, llvm::IRBuilder<> &)
 
- Protected Types inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >
enum class  eOpConv
 

Protected Member Functions

virtual void initializeArchSpecific () override
 
virtual void initializeRegNameMap () override
 
virtual void initializeRegTypeMap () override
 
virtual void initializePseudoCallInstructionIDs () override
 
virtual void generateEnvironmentArchSpecific () override
 
virtual void generateDataLayout () override
 
virtual void generateRegisters () override
 
virtual uint32_t getCarryRegister () override
 
virtual void translateInstruction (cs_insn *i, llvm::IRBuilder<> &irb) override
 
llvm::Value * getCurrentPc (cs_insn *i)
 
void initializeRegistersParentMapToOther (const std::vector< arm64_reg > &rs, arm64_reg other)
 
void initializeRegistersParentMap ()
 
llvm::Value * extractVectorValue (llvm::IRBuilder<> &irb, cs_arm64_op &op, llvm::Value *val)
 
llvm::Value * generateOperandExtension (llvm::IRBuilder<> &irb, arm64_extender ext, llvm::Value *val, llvm::Type *destType=nullptr)
 
llvm::Value * generateOperandShift (llvm::IRBuilder<> &irb, cs_arm64_op &op, llvm::Value *val, bool updateFlags=false)
 
llvm::Value * generateShiftAsr (llvm::IRBuilder<> &irb, llvm::Value *val, llvm::Value *n, bool updateFlags=false)
 
llvm::Value * generateShiftLsl (llvm::IRBuilder<> &irb, llvm::Value *val, llvm::Value *n, bool updateFlags=false)
 
llvm::Value * generateShiftLsr (llvm::IRBuilder<> &irb, llvm::Value *val, llvm::Value *n, bool updateFlags=false)
 
llvm::Value * generateShiftRor (llvm::IRBuilder<> &irb, llvm::Value *val, llvm::Value *n, bool updateFlags=false)
 
llvm::Value * generateShiftMsl (llvm::IRBuilder<> &irb, llvm::Value *val, llvm::Value *n, bool updateFlags=false)
 
llvm::Value * generateInsnConditionCode (llvm::IRBuilder<> &irb, cs_arm64 *ai)
 
llvm::Value * generateGetOperandMemAddr (cs_arm64_op &op, llvm::IRBuilder<> &irb)
 
virtual llvm::Value * loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW) override
 
virtual llvm::Value * loadOp (cs_arm64_op &op, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr, bool lea=false) override
 
virtual llvm::Instruction * storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::ZEXT_TRUNC_OR_BITCAST) override
 
virtual llvm::Instruction * storeOp (cs_arm64_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::ZEXT_TRUNC_OR_BITCAST) override
 
void generatePseudoInstruction (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 This functions will generate psuedo asm translation. Instructions that are not implemented fall back to this method which will check there is need to generate conditional code and then generate given pseudo. More...
 
bool ifVectorGeneratePseudo (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb, _translator_fnc=nullptr)
 
llvm::Value * generateFPBitCastToIntegerType (llvm::IRBuilder<> &irb, llvm::Value *val) const
 
llvm::Value * generateIntBitCastToFP (llvm::IRBuilder<> &irb, llvm::Value *val) const
 
bool isCondIns (cs_arm64 *i) const
 
bool isFPRegister (cs_arm64_op &op, bool onlySupported=true) const
 Check if register is FP type. More...
 
bool isVectorRegister (cs_arm64_op &op) const
 Check if register is Vector type. This is true for all ARM64_REG_V* registers. More...
 
virtual bool isOperandRegister (cs_arm64_op &op) override
 
virtual uint8_t getOperandAccess (cs_arm64_op &op) override
 
void translateAdc (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateAdd (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateAnd (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateCondOp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateCondSelOp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateCondCompare (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateClz (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateShifts (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateSub (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateNeg (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateNgc (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateSbc (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMov (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMovk (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateStr (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateStp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateLdr (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateLdp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateAdr (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateB (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateBl (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateBr (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateCbnz (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateCsel (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateCset (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateDiv (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateEor (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateExtensions (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateExtr (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateOrr (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMul (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMulOpl (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMull (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMulh (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateNop (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateTbnz (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateRet (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateRev (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFAdd (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFCmp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFCCmp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFCsel (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFCvt (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFCvtf (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFCvtz (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFDiv (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFMadd (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFMinMax (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFMinMaxNum (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFMsub (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFMov (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateMovi (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFMul (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFSub (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
void translateFUnaryOp (cs_insn *i, cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
- Protected Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >
llvm::Value * generateTypeConversion (llvm::IRBuilder<> &irb, llvm::Value *from, llvm::Type *to, eOpConv ct)
 
llvm::Type * _checkTypeConversion (llvm::IRBuilder<> &irb, llvm::Type *to, eOpConv ct)
 
virtual void initialize ()
 
virtual void openHandle ()
 
virtual void configureHandle ()
 
virtual void closeHandle ()
 
virtual void generateEnvironment ()
 
virtual void generateSpecialAsm2LlvmMapGlobal ()
 
virtual llvm::StoreInst * generateSpecialAsm2LlvmInstr (llvm::IRBuilder<> &irb, cs_insn *i)
 
virtual void generateCallFunction ()
 
virtual llvm::CallInst * generateCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual llvm::CallInst * generateCondCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual void generateReturnFunction ()
 
virtual llvm::CallInst * generateReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual llvm::CallInst * generateCondReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual void generateBranchFunction ()
 
virtual llvm::CallInst * generateBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t)
 
virtual void generateCondBranchFunction ()
 
virtual llvm::CallInst * generateCondBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t)
 
virtual llvm::GlobalVariable * createRegister (uint32_t r, llvm::GlobalValue::LinkageTypes lt=llvm::GlobalValue::LinkageTypes::InternalLinkage, llvm::Constant *initializer=nullptr)
 
virtual llvm::Value * loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW)=0
 
llvm::Value * loadOp (cs_arm64 *ci, llvm::IRBuilder<> &irb, std::size_t idx, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
virtual llvm::Instruction * storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0
 
virtual llvm::Instruction * storeOp (cs_arm64_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0
 
std::vector< llvm::Value * > _loadOps (cs_arm64 *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
std::vector< llvm::Value * > _loadOpsUniversal (cs_arm64 *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, eOpConv ict=eOpConv::SEXT_TRUNC_OR_BITCAST, eOpConv fct=eOpConv::FPCAST_OR_BITCAST)
 
llvm::Value * loadOpUnary (cs_arm64 *ci, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, llvm::Type *loadType=nullptr, eOpConv ct=eOpConv::THROW)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_arm64 *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_arm64 *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinary (cs_arm64 *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
llvm::Value * loadOpBinaryOp0 (cs_arm64 *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr)
 
llvm::Value * loadOpBinaryOp1 (cs_arm64 *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_arm64 *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_arm64 *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpTernary (cs_arm64 *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinaryOrTernaryOp1Op2 (cs_arm64 *ai, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING)
 
std::pair< llvm::Value *, llvm::Value * > loadOpBinaryOrTernaryOp1Op2 (cs_arm64 *ai, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct)
 
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > loadOpQuaternaryOp1Op2Op3 (cs_arm64 *ai, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAdd (llvm::Value *add, llvm::Value *op0, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAddC (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateCarryAddInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateCarryAddCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateOverflowAdd (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateOverflowAddC (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateOverflowSub (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateOverflowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateBorrowSub (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateBorrowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::Value * generateBorrowSubInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb)
 
llvm::Value * generateBorrowSubCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr)
 
llvm::IntegerType * getDefaultType ()
 
llvm::Value * getThisInsnAddress (cs_insn *i)
 
llvm::Value * getNextInsnAddress (cs_insn *i)
 
llvm::BranchInst * getCondBranchForInsnInIfThen (llvm::Instruction *i) const
 
std::string getPseudoAsmFunctionName (cs_insn *insn)
 
llvm::Function * getPseudoAsmFunction (cs_insn *insn, llvm::FunctionType *type, const std::string &name="")
 
llvm::Function * getPseudoAsmFunction (cs_insn *insn, llvm::Type *retType, llvm::ArrayRef< llvm::Type * > params, const std::string &name="")
 
void translatePseudoAsmOp0Fnc (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1Op2 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1Op2 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1Op2 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmFncOp0Op1Op2Op3 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp1Op2Op3 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0FncOp0Op1Op2Op3 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void translatePseudoAsmOp0Op1FncOp0Op1Op2Op3 (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
virtual uint8_t getOperandAccess (cs_arm64_op &op)
 
virtual void translatePseudoAsmGeneric (cs_insn *i, cs_arm64 *ci, llvm::IRBuilder<> &irb)
 
void throwUnexpectedOperands (cs_insn *i, const std::string comment="")
 
void throwUnhandledInstructions (cs_insn *i, const std::string comment="")
 

Protected Attributes

std::map< uint32_t, uint32_t > _reg2parentMap
 Mapping from register to its parent register. More...
 
- Protected Attributes inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >
csh _handle
 
cs_arch _arch
 
cs_mode _basicMode
 
cs_mode _extraMode
 
cs_mode _origBasicMode
 
llvm::Module * _module
 
llvm::GlobalVariable * _asm2llvmGv
 
llvm::Function * _callFunction
 
llvm::Function * _returnFunction
 
llvm::Function * _branchFunction
 
llvm::Function * _condBranchFunction
 
llvm::GlobalValue::LinkageTypes _regLt
 
std::map< std::pair< std::string, llvm::FunctionType * >, llvm::Function * > _insn2asmFunctions
 (fnc_name, fnc_type) -> fnc More...
 
std::set< llvm::Function * > _asmFunctions
 
std::map< uint32_t, std::string > _reg2name
 
std::map< uint32_t, llvm::Type * > _reg2type
 
std::map< llvm::GlobalVariable *, uint32_t > _llvm2CapstoneRegs
 
std::map< uint32_t, llvm::GlobalVariable * > _capstone2LlvmRegs
 
llvm::CallInst * _branchGenerated
 
bool _inCondition
 
llvm::Value * op0
 
llvm::Value * op1
 
llvm::Value * op2
 
llvm::Value * op3
 
cs_insn * _insn
 Capstone instruction being currently translated. More...
 
std::set< unsigned int > _callInsnIds
 
std::set< unsigned int > _returnInsnIds
 
std::set< unsigned int > _branchInsnIds
 
std::set< unsigned int > _condBranchInsnIds
 
std::set< unsigned int > _controlFlowInsnIds
 
bool _ignoreUnexpectedOperands
 
bool _ignoreUnhandledInstructions
 
bool _generatePseudoAsmFunctions
 

Static Protected Attributes

static std::map< std::size_t, _translator_fnc_i2fm
 

Additional Inherited Members

- Static Public Member Functions inherited from retdec::capstone2llvmir::Capstone2LlvmIrTranslator
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArch (cs_arch a, llvm::Module *m, cs_mode basic=CS_MODE_LITTLE_ENDIAN, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArm (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateThumb (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateArm64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips3 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateMips32R6 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_16 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateX86_64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpc32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpc64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreatePpcQpx (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateSparc (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateSysz (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 
static std::unique_ptr< Capstone2LlvmIrTranslatorcreateXcore (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN)
 

Member Typedef Documentation

◆ _translator_fnc

using retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::_translator_fnc = void (Capstone2LlvmIrTranslatorArm64_impl::*)(cs_insn* i, cs_arm64*, llvm::IRBuilder<>&)
protected

Constructor & Destructor Documentation

◆ Capstone2LlvmIrTranslatorArm64_impl()

retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::Capstone2LlvmIrTranslatorArm64_impl ( llvm::Module *  m,
cs_mode  basic = CS_MODE_ARM,
cs_mode  extra = CS_MODE_LITTLE_ENDIAN 
)

Member Function Documentation

◆ extractVectorValue()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::extractVectorValue ( llvm::IRBuilder<> &  irb,
cs_arm64_op &  op,
llvm::Value *  val 
)
protected

◆ generateDataLayout()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateDataLayout ( )
overrideprotectedvirtual

Generate LLVM data layout into the module. This is architecture and mode specific and must be implemented in concrete classes.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ generateEnvironmentArchSpecific()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateEnvironmentArchSpecific ( )
overrideprotectedvirtual

Generate architecture specific environment on top of common environment generated by generateEnvironment().

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ generateFPBitCastToIntegerType()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateFPBitCastToIntegerType ( llvm::IRBuilder<> &  irb,
llvm::Value *  val 
) const
protected

◆ generateGetOperandMemAddr()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateGetOperandMemAddr ( cs_arm64_op &  op,
llvm::IRBuilder<> &  irb 
)
protected

◆ generateInsnConditionCode()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateInsnConditionCode ( llvm::IRBuilder<> &  irb,
cs_arm64 *  ai 
)
protected

◆ generateIntBitCastToFP()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateIntBitCastToFP ( llvm::IRBuilder<> &  irb,
llvm::Value *  val 
) const
protected

◆ generateOperandExtension()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateOperandExtension ( llvm::IRBuilder<> &  irb,
arm64_extender  ext,
llvm::Value *  val,
llvm::Type *  destType = nullptr 
)
protected

◆ generateOperandShift()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateOperandShift ( llvm::IRBuilder<> &  irb,
cs_arm64_op &  op,
llvm::Value *  val,
bool  updateFlags = false 
)
protected

◆ generatePseudoInstruction()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generatePseudoInstruction ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

This functions will generate psuedo asm translation. Instructions that are not implemented fall back to this method which will check there is need to generate conditional code and then generate given pseudo.

◆ generateRegisters()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateRegisters ( )
overrideprotectedvirtual

Generate LLVM global variables for registers. This is architecture and mode specific and must be implemented in concrete classes.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ generateShiftAsr()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateShiftAsr ( llvm::IRBuilder<> &  irb,
llvm::Value *  val,
llvm::Value *  n,
bool  updateFlags = false 
)
protected

◆ generateShiftLsl()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateShiftLsl ( llvm::IRBuilder<> &  irb,
llvm::Value *  val,
llvm::Value *  n,
bool  updateFlags = false 
)
protected

◆ generateShiftLsr()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateShiftLsr ( llvm::IRBuilder<> &  irb,
llvm::Value *  val,
llvm::Value *  n,
bool  updateFlags = false 
)
protected

◆ generateShiftMsl()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateShiftMsl ( llvm::IRBuilder<> &  irb,
llvm::Value *  val,
llvm::Value *  n,
bool  updateFlags = false 
)
protected

◆ generateShiftRor()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::generateShiftRor ( llvm::IRBuilder<> &  irb,
llvm::Value *  val,
llvm::Value *  n,
bool  updateFlags = false 
)
protected

◆ getArchByteSize()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::getArchByteSize ( )
overridevirtual
Returns
Architecture byte size according to the currently set basic mode.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ getCarryRegister()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::getCarryRegister ( )
overrideprotectedvirtual

◆ getCurrentPc()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::getCurrentPc ( cs_insn *  i)
protected

◆ getOperandAccess()

uint8_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::getOperandAccess ( cs_arm64_op &  op)
overrideprotectedvirtual

◆ getParentRegister()

uint32_t retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::getParentRegister ( uint32_t  r) const
overridevirtual
Returns
Capstone register that is parent to the specified Capstone register r. Register can be its own parent.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64.

◆ ifVectorGeneratePseudo()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::ifVectorGeneratePseudo ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb,
_translator_fnc  trans = nullptr 
)
protected

◆ initializeArchSpecific()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::initializeArchSpecific ( )
overrideprotectedvirtual

Do architecture and mode specific initialization on top of common initialization done by initialize();

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ initializePseudoCallInstructionIDs()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::initializePseudoCallInstructionIDs ( )
overrideprotectedvirtual

If possible, initialize _callInsnIds, _returnInsnIds, _branchInsnIds, _condBranchInsnIds, _condBranchInsnIds sets.

For some architectures, it is not possible to initialize all the instructions that may generate control flow change. E.g. Any kind of ARM instruction that writes to PC is changing control flow.

This is not ideal, because each time some instruction that generates one of these is added, or removed, its ID must also be manualy added, or removed, here. This could be easily forgotten. Right now, I do not know how to solve this better (i.e. automatic update).

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ initializeRegistersParentMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::initializeRegistersParentMap ( )
protected

◆ initializeRegistersParentMapToOther()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::initializeRegistersParentMapToOther ( const std::vector< arm64_reg > &  rs,
arm64_reg  other 
)
protected

◆ initializeRegNameMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::initializeRegNameMap ( )
overrideprotectedvirtual

Initialize _reg2name. See comment for _reg2name to know what must be initialized, and what may or may not be initialized.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ initializeRegTypeMap()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::initializeRegTypeMap ( )
overrideprotectedvirtual

Initialize _reg2type. See comment for _reg2type to know what must be initialized, and what may or may not be initialized.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_arm64, cs_arm64_op >.

◆ isAllowedBasicMode()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::isAllowedBasicMode ( cs_mode  m)
overridevirtual

Check if mode m is an allowed basic mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.

Returns
True if mode is allowed, false otherwise.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ isAllowedExtraMode()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::isAllowedExtraMode ( cs_mode  m)
overridevirtual

Check if mode m is an allowed extra mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.

Returns
True if mode is allowed, false otherwise.

Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.

◆ isCondIns()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::isCondIns ( cs_arm64 *  i) const
protected

◆ isFPRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::isFPRegister ( cs_arm64_op &  op,
bool  onlySupported = true 
) const
protected

Check if register is FP type.

Parameters
opCapstone operand type to check.
onlySupportedAccount only for supported registers in retdec.

◆ isOperandRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::isOperandRegister ( cs_arm64_op &  op)
overrideprotectedvirtual

◆ isVectorRegister()

bool retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::isVectorRegister ( cs_arm64_op &  op) const
protected

Check if register is Vector type. This is true for all ARM64_REG_V* registers.

Parameters
opCapstone operand type to check.

◆ loadOp()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::loadOp ( cs_arm64_op &  op,
llvm::IRBuilder<> &  irb,
llvm::Type *  ty = nullptr,
bool  lea = false 
)
overrideprotectedvirtual

◆ loadRegister()

llvm::Value * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::loadRegister ( uint32_t  r,
llvm::IRBuilder<> &  irb,
llvm::Type *  dstType = nullptr,
eOpConv  ct = eOpConv::THROW 
)
overrideprotectedvirtual

◆ storeOp()

llvm::Instruction * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::storeOp ( cs_arm64_op &  op,
llvm::Value *  val,
llvm::IRBuilder<> &  irb,
eOpConv  ct = eOpConv::ZEXT_TRUNC_OR_BITCAST 
)
overrideprotectedvirtual

◆ storeRegister()

llvm::Instruction * retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::storeRegister ( uint32_t  r,
llvm::Value *  val,
llvm::IRBuilder<> &  irb,
eOpConv  ct = eOpConv::ZEXT_TRUNC_OR_BITCAST 
)
overrideprotectedvirtual

◆ translateAdc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateAdc ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_ADC

◆ translateAdd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateAdd ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_ADD, ARM64_INS_CMN

◆ translateAdr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateAdr ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_ADR, ARM64_INS_ADRP

◆ translateAnd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateAnd ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_AND, ARM64_INS_BIC, ARM64_INS_TST

◆ translateB()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateB ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_B

◆ translateBl()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateBl ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_BL

◆ translateBr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateBr ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_BR, ARM64_INS_BRL

◆ translateCbnz()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateCbnz ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CBNZ, ARM64_INS_CBZ

◆ translateClz()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateClz ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CLZ

◆ translateCondCompare()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateCondCompare ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CCMN, ARM64_INS_CCMP

◆ translateCondOp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateCondOp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CINC, ARM64_INS_CINV, ARM64_INS_CNEG

◆ translateCondSelOp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateCondSelOp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CSINC, ARM64_INS_CSINV, ARM64_INS_CSNEG

◆ translateCsel()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateCsel ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CSEL

◆ translateCset()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateCset ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_CSET, ARM64_INS_CSETM

◆ translateDiv()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateDiv ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_UDIV, ARM64_INS_SDIV

◆ translateEor()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateEor ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_EOR, ARM64_INS_EON

◆ translateExtensions()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateExtensions ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_SXTB, ARM64_INS_SXTH, ARM64_INS_SXTW ARM64_INS_UXTB, ARM64_INS_UXTH

◆ translateExtr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateExtr ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_EXTR

◆ translateFAdd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFAdd ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FADD

◆ translateFCCmp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFCCmp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FCCMP

◆ translateFCmp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFCmp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FCMP

◆ translateFCsel()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFCsel ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FCSEL

◆ translateFCvt()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFCvt ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FCVT

◆ translateFCvtf()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFCvtf ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_UCVTF, ARM64_INS_SCVTF

◆ translateFCvtz()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFCvtz ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FCVTZS, ARM64_INS_FCVTZU

◆ translateFDiv()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFDiv ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FDIV

◆ translateFMadd()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFMadd ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FMADD, ARM64_INS_FNMADD

◆ translateFMinMax()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFMinMax ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FMAX, ARM64_INS_FMIN

◆ translateFMinMaxNum()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFMinMaxNum ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FMAXNM, ARM64_INS_FMINNM

◆ translateFMov()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFMov ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FMOV

◆ translateFMsub()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFMsub ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FMSUB, ARM64_INS_FNMSUB

◆ translateFMul()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFMul ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FMUL, ARM64_INS_FNMUL

◆ translateFSub()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFSub ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FSUB

◆ translateFUnaryOp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateFUnaryOp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_FNEG, ARM64_INS_FABS, ARM64_INS_FSQRT

◆ translateInstruction()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateInstruction ( cs_insn *  i,
llvm::IRBuilder<> &  irb 
)
overrideprotectedvirtual

◆ translateLdp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateLdp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_LDP, ARM64_INS_LDPSW ARM64_INS_LDNP (Non-temporal) ARM64_INS_LDXP (Exclusive) ARM64_INS_LDAXP (Exclusive Aquire)

◆ translateLdr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateLdr ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_LDR ARM64_INS_LDURB, ARM64_INS_LDUR, ARM64_INS_LDURH, ARM64_INS_LDURSB, ARM64_INS_LDURSH, ARM64_INS_LDURSW ARM64_INS_LDRB, ARM64_INS_LDRH, ARM64_INS_LDRSB, ARM64_INS_LDRSH, ARM64_INS_LDRSW ARM64_INS_LDTR, ARM64_INS_LDTRB, ARM64_INS_LDTRSB, ARM64_INS_LDTRH, ARM64_INS_LDTRSH, ARM64_INS_LDTRSW ARM64_INS_LDXR, ARM64_INS_LDXRB, ARM64_INS_LDXRH ARM64_INS_LDAXR, ARM64_INS_LDAXRB, ARM64_INS_LDAXRH ARM64_INS_LDAR, ARM64_INS_LDARB, ARM64_INS_LDARH

◆ translateMov()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMov ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_MOV, ARM64_INS_MVN, ARM64_INS_MOVZ, ARM64_INS_MOVN

◆ translateMovi()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMovi ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_MOVI

◆ translateMovk()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMovk ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_MOVK

◆ translateMul()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMul ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_MUL, ARM64_INS_MADD, ARM64_INS_MSUB, ARM64_INS_MNEG

◆ translateMulh()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMulh ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_UMULH, ARM64_INS_SMULH

◆ translateMull()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMull ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_UMULL, ARM64_INS_SMULL

◆ translateMulOpl()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateMulOpl ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_UMADDL, ARM64_INS_SMADDL ARM64_INS_UMSUBL, ARM64_INS_SMSUBL ARM64_INS_UMNEGL, ARM64_INS_SMNEGL

◆ translateNeg()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateNeg ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_NEG ARM64_INS_NEGS for some reason capstone includes this instruction as alias.

◆ translateNgc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateNgc ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_NGC, ARM64_INS_NGCS

◆ translateNop()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateNop ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_NOP

◆ translateOrr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateOrr ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_ORR, ARM64_INS_ORN

◆ translateRet()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateRet ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_RET

◆ translateRev()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateRev ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_REV, ARM64_INS_RBIT

◆ translateSbc()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateSbc ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_SBC

◆ translateShifts()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateShifts ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_ASR, ARM64_INS_LSL, ARM64_INS_LSR, ARM64_INS_ROR

◆ translateStp()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateStp ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_STP, ARM64_INS_STNP ARM64_INS_STXP – Maybe should be pseudo

◆ translateStr()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateStr ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_STR, ARM64_INS_STRB, ARM64_INS_STRH ARM64_INS_STUR, ARM64_INS_STURB, ARM64_INS_STURH ARM64_INS_STTR, ARM64_INS_STTRB, ARM64_INS_STTRH ARM64_INS_STXR, ARM64_INS_STXRB, ARM64_INS_STXRH – Maybe those should be pseudo

◆ translateSub()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateSub ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_SUB, ARM64_INS_CMP

◆ translateTbnz()

void retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::translateTbnz ( cs_insn *  i,
cs_arm64 *  ai,
llvm::IRBuilder<> &  irb 
)
protected

ARM64_INS_TBNZ, ARM64_INS_TBZ

Member Data Documentation

◆ _i2fm

std::map< std::size_t, void(Capstone2LlvmIrTranslatorArm64_impl::*)(cs_insn *i, cs_arm64 *, llvm::IRBuilder<> &)> retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::_i2fm
staticprotected

◆ _reg2parentMap

std::map<uint32_t, uint32_t> retdec::capstone2llvmir::Capstone2LlvmIrTranslatorArm64_impl::_reg2parentMap
protected

Mapping from register to its parent register.


The documentation for this class was generated from the following files: