retdec
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#include <x86_impl.h>
Public Member Functions | |
Capstone2LlvmIrTranslatorX86_impl (llvm::Module *m, cs_mode basic=CS_MODE_32, cs_mode extra=CS_MODE_LITTLE_ENDIAN) | |
virtual bool | isAllowedBasicMode (cs_mode m) override |
virtual bool | isAllowedExtraMode (cs_mode m) override |
virtual uint32_t | getArchByteSize () override |
virtual bool | isAnyPseudoFunction (llvm::Function *f) const override |
virtual bool | isAnyPseudoFunctionCall (llvm::CallInst *c) const override |
virtual bool | isX87DataStoreFunction (llvm::Function *f) const override |
virtual bool | isX87DataStoreFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getX87DataStoreFunction () const override |
virtual bool | isX87DataLoadFunction (llvm::Function *f) const override |
virtual bool | isX87DataLoadFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getX87DataLoadFunction () const override |
virtual uint32_t | getParentRegister (uint32_t r) const override |
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Capstone2LlvmIrTranslator_impl (cs_arch a, cs_mode basic, cs_mode extra, llvm::Module *m) | |
virtual | ~Capstone2LlvmIrTranslator_impl () |
virtual void | setIgnoreUnexpectedOperands (bool f) override |
virtual void | setIgnoreUnhandledInstructions (bool f) override |
virtual void | setGeneratePseudoAsmFunctions (bool f) override |
virtual bool | isIgnoreUnexpectedOperands () const override |
virtual bool | isIgnoreUnhandledInstructions () const override |
virtual bool | isGeneratePseudoAsmFunctions () const override |
virtual void | modifyBasicMode (cs_mode m) override |
virtual void | modifyExtraMode (cs_mode m) override |
virtual uint32_t | getArchBitSize () override |
virtual TranslationResult | translate (const uint8_t *bytes, std::size_t size, retdec::common::Address a, llvm::IRBuilder<> &irb, std::size_t count=0, bool stopOnBranch=false) override |
virtual TranslationResultOne | translateOne (const uint8_t *&bytes, std::size_t &size, retdec::common::Address &a, llvm::IRBuilder<> &irb) override |
virtual const csh & | getCapstoneEngine () const override |
virtual cs_arch | getArchitecture () const override |
virtual cs_mode | getBasicMode () const override |
virtual cs_mode | getExtraMode () const override |
virtual bool | hasDelaySlot (uint32_t id) const override |
virtual bool | hasDelaySlotTypical (uint32_t id) const override |
virtual bool | hasDelaySlotLikely (uint32_t id) const override |
virtual std::size_t | getDelaySlot (uint32_t id) const override |
virtual llvm::GlobalVariable * | getRegister (uint32_t r) override |
virtual std::string | getRegisterName (uint32_t r) const override |
virtual uint32_t | getRegisterBitSize (uint32_t r) const override |
virtual uint32_t | getRegisterByteSize (uint32_t r) const override |
virtual llvm::Type * | getRegisterType (uint32_t r) const override |
virtual bool | isControlFlowInstruction (cs_insn &i) const override |
virtual bool | isCallInstruction (cs_insn &i) const override |
virtual bool | isReturnInstruction (cs_insn &i) const override |
virtual bool | isBranchInstruction (cs_insn &i) const override |
virtual bool | isCondBranchInstruction (cs_insn &i) const override |
virtual llvm::Module * | getModule () const override |
virtual bool | isSpecialAsm2LlvmMapGlobal (llvm::Value *v) const override |
virtual llvm::StoreInst * | isSpecialAsm2LlvmInstr (llvm::Value *v) const override |
virtual llvm::GlobalVariable * | getAsm2LlvmMapGlobalVariable () const override |
virtual bool | isCallFunction (llvm::Function *f) const override |
virtual bool | isCallFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionCallFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getCallFunction () const override |
virtual bool | isReturnFunction (llvm::Function *f) const override |
virtual bool | isReturnFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionReturnFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getReturnFunction () const override |
virtual bool | isBranchFunction (llvm::Function *f) const override |
virtual bool | isBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getBranchFunction () const override |
virtual bool | isCondBranchFunction (llvm::Function *f) const override |
virtual bool | isCondBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::BranchInst * | isInConditionCondBranchFunctionCall (llvm::CallInst *c) const override |
virtual llvm::Function * | getCondBranchFunction () const override |
virtual llvm::GlobalVariable * | isRegister (llvm::Value *v) const override |
virtual uint32_t | getCapstoneRegister (llvm::GlobalVariable *gv) const override |
virtual bool | isPseudoAsmFunction (llvm::Function *f) const override |
virtual bool | isPseudoAsmFunctionCall (llvm::CallInst *c) const override |
virtual const std::set< llvm::Function * > & | getPseudoAsmFunctions () const override |
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virtual | ~Capstone2LlvmIrTranslator ()=default |
Protected Member Functions | |
virtual void | initializeArchSpecific () override |
virtual void | initializeRegNameMap () override |
virtual void | initializeRegTypeMap () override |
virtual void | initializePseudoCallInstructionIDs () override |
virtual void | generateEnvironmentArchSpecific () override |
virtual void | generateDataLayout () override |
virtual void | generateRegisters () override |
virtual uint32_t | getCarryRegister () override |
virtual void | translateInstruction (cs_insn *i, llvm::IRBuilder<> &irb) override |
void | generateRegistersCommon () |
void | generateRegisters16 () |
void | generateRegisters32 () |
void | generateRegisters64 () |
void | generateX87RegLoadStoreFunctions () |
void | initializeRegistersParentMap () |
void | initializeRegistersParentMap16 () |
void | initializeRegistersParentMap32 () |
void | initializeRegistersParentMap64 () |
void | initializeRegistersParentMapToOther (const std::vector< x86_reg > &rs, x86_reg other) |
uint32_t | getAccumulatorRegister (std::size_t size) |
uint32_t | getStackPointerRegister () |
uint32_t | getBasePointerRegister () |
virtual llvm::Value * | getCurrentPc (cs_insn *i) |
virtual llvm::Value * | loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW) override |
virtual llvm::Value * | loadOp (cs_x86_op &op, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr, bool lea=false) override |
virtual llvm::StoreInst * | storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::ZEXT_TRUNC_OR_BITCAST) override |
virtual llvm::Instruction * | storeOp (cs_x86_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::ZEXT_TRUNC_OR_BITCAST) override |
void | storeRegisters (llvm::IRBuilder<> &irb, const std::vector< std::pair< uint32_t, llvm::Value * >> ®s) |
void | storeRegistersPlusSflags (llvm::IRBuilder<> &irb, llvm::Value *sflagsVal, const std::vector< std::pair< uint32_t, llvm::Value * >> ®s) |
unsigned | getAddrSpace (x86_reg segment) |
bool | isX87DataRegister (uint32_t r) |
llvm::Value * | loadX87Top (llvm::IRBuilder<> &irb) |
llvm::Value * | loadX87TopDec (llvm::IRBuilder<> &irb) |
llvm::Value * | loadX87TopInc (llvm::IRBuilder<> &irb) |
llvm::Value * | loadX87TopDecStore (llvm::IRBuilder<> &irb) |
llvm::Value * | loadX87TopIncStore (llvm::IRBuilder<> &irb) |
llvm::Value * | x87IncTop (llvm::IRBuilder<> &irb, llvm::Value *top=nullptr) |
llvm::Value * | x87DecTop (llvm::IRBuilder<> &irb, llvm::Value *top=nullptr) |
llvm::CallInst * | storeX87DataReg (llvm::IRBuilder<> &irb, llvm::Value *rNum, llvm::Value *val) |
llvm::CallInst * | loadX87DataReg (llvm::IRBuilder<> &irb, llvm::Value *rNum) |
std::tuple< llvm::Value *, llvm::Value * > | loadOpFloatingNullaryOrUnaryTop (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value *, llvm::Value * > | loadOpFloatingBinaryTop (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
llvm::Value * | generateZeroFlag (llvm::Value *val, llvm::IRBuilder<> &irb) |
llvm::Value * | generateSignFlag (llvm::Value *val, llvm::IRBuilder<> &irb) |
llvm::Value * | generateParityFlag (llvm::Value *val, llvm::IRBuilder<> &irb) |
void | generateSetSflags (llvm::Value *val, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcAE (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcA (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcBE (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcB (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcE (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcGE (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcG (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcLE (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcL (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcNE (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcNO (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcNP (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcNS (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcO (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcP (llvm::IRBuilder<> &irb) |
llvm::Value * | generateCcS (llvm::IRBuilder<> &irb) |
virtual bool | isOperandRegister (cs_x86_op &op) override |
virtual uint8_t | getOperandAccess (cs_x86_op &op) override |
void | translateAaa (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateAad (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateAam (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateAdc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateAdd (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateAnd (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateBsf (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateBswap (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateBt (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateBtc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateBtr (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateBts (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCall (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCbw (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCdq (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCdqe (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateClc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCld (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCli (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCmc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCMovCc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCmpxchg (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCmpxchg8b (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCmpxchg16b (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCompareString (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCpuid (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCqo (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCwd (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateCwde (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateDaaDas (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateDec (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateDiv (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateEnter (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFabs (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFadd (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFchs (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFcos (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFdecstp (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFdiv (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFdivr (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFprem (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFincstp (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFist (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFld (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFbld (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFbstp (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFCMovCc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFloadConstant (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFmul (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFninit (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFrndint (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFsin (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFsincos (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFtan (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFatan (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFsqrt (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFscale (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFst (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFsub (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFsubr (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFucomPop (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFxam (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFxtract (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFxch (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateF2xm1 (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFyl2x (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFfree (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFnstsw (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFnclex (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFrstor (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFnsave (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFnstenv (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFxsave (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateFxstor (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateImul (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateInc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateIns (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateJCc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateJecxz (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateJmp (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLahf (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLea (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLeave (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLcall (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLjmp (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLoadFarPtr (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLoadString (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateLoop (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateMov (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateMoveString (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateMul (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateNeg (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateNop (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateNot (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateOr (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateOuts (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translatePop (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translatePopa (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translatePopEflags (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translatePush (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translatePusha (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translatePushEflags (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRcr (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRcl (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRdtsc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRdtscp (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRol (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRor (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateRet (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateSahf (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateSalc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateSbb (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateScanString (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateSetCc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateShiftLeft (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateShiftRight (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateShld (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateShrd (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateStc (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateStd (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateStoreString (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateSub (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateXchg (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateXlatb (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
void | translateXor (cs_insn *i, cs_x86 *xi, llvm::IRBuilder<> &irb) |
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llvm::Value * | generateTypeConversion (llvm::IRBuilder<> &irb, llvm::Value *from, llvm::Type *to, eOpConv ct) |
llvm::Type * | _checkTypeConversion (llvm::IRBuilder<> &irb, llvm::Type *to, eOpConv ct) |
virtual void | initialize () |
virtual void | openHandle () |
virtual void | configureHandle () |
virtual void | closeHandle () |
virtual void | generateEnvironment () |
virtual void | generateSpecialAsm2LlvmMapGlobal () |
virtual llvm::StoreInst * | generateSpecialAsm2LlvmInstr (llvm::IRBuilder<> &irb, cs_insn *i) |
virtual void | generateCallFunction () |
virtual llvm::CallInst * | generateCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t) |
virtual llvm::CallInst * | generateCondCallFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t) |
virtual void | generateReturnFunction () |
virtual llvm::CallInst * | generateReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t) |
virtual llvm::CallInst * | generateCondReturnFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t) |
virtual void | generateBranchFunction () |
virtual llvm::CallInst * | generateBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *t) |
virtual void | generateCondBranchFunction () |
virtual llvm::CallInst * | generateCondBranchFunctionCall (llvm::IRBuilder<> &irb, llvm::Value *cond, llvm::Value *t) |
virtual llvm::GlobalVariable * | createRegister (uint32_t r, llvm::GlobalValue::LinkageTypes lt=llvm::GlobalValue::LinkageTypes::InternalLinkage, llvm::Constant *initializer=nullptr) |
virtual llvm::Value * | loadRegister (uint32_t r, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::THROW)=0 |
llvm::Value * | loadOp (cs_x86 *ci, llvm::IRBuilder<> &irb, std::size_t idx, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
virtual llvm::Instruction * | storeRegister (uint32_t r, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0 |
virtual llvm::Instruction * | storeOp (cs_x86_op &op, llvm::Value *val, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::SEXT_TRUNC_OR_BITCAST)=0 |
std::vector< llvm::Value * > | _loadOps (cs_x86 *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, llvm::Type *loadType=nullptr, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
std::vector< llvm::Value * > | _loadOpsUniversal (cs_x86 *ci, llvm::IRBuilder<> &irb, std::size_t opCnt, bool strictCheck=true, eOpConv ict=eOpConv::SEXT_TRUNC_OR_BITCAST, eOpConv fct=eOpConv::FPCAST_OR_BITCAST) |
llvm::Value * | loadOpUnary (cs_x86 *ci, llvm::IRBuilder<> &irb, llvm::Type *dstType=nullptr, llvm::Type *loadType=nullptr, eOpConv ct=eOpConv::THROW) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinary (cs_x86 *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinary (cs_x86 *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinary (cs_x86 *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
llvm::Value * | loadOpBinaryOp0 (cs_x86 *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr) |
llvm::Value * | loadOpBinaryOp1 (cs_x86 *ci, llvm::IRBuilder<> &irb, llvm::Type *ty=nullptr) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpTernary (cs_x86 *ci, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpTernary (cs_x86 *ci, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpTernary (cs_x86 *ci, llvm::IRBuilder<> &irb, llvm::Type *loadType, llvm::Type *dstType=nullptr, eOpConv ct=eOpConv::NOTHING) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinaryOrTernaryOp1Op2 (cs_x86 *ai, llvm::IRBuilder<> &irb, eOpConv ct=eOpConv::NOTHING) |
std::pair< llvm::Value *, llvm::Value * > | loadOpBinaryOrTernaryOp1Op2 (cs_x86 *ai, llvm::IRBuilder<> &irb, eOpConv ict, eOpConv fct) |
std::tuple< llvm::Value *, llvm::Value *, llvm::Value * > | loadOpQuaternaryOp1Op2Op3 (cs_x86 *ai, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCarryAdd (llvm::Value *add, llvm::Value *op0, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCarryAddC (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateCarryAddInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateCarryAddCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateOverflowAdd (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateOverflowAddC (llvm::Value *add, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateOverflowSub (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateOverflowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateBorrowSub (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateBorrowSubC (llvm::Value *sub, llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::Value * | generateBorrowSubInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb) |
llvm::Value * | generateBorrowSubCInt4 (llvm::Value *op0, llvm::Value *op1, llvm::IRBuilder<> &irb, llvm::Value *cf=nullptr) |
llvm::IntegerType * | getDefaultType () |
llvm::Value * | getThisInsnAddress (cs_insn *i) |
llvm::Value * | getNextInsnAddress (cs_insn *i) |
llvm::BranchInst * | getCondBranchForInsnInIfThen (llvm::Instruction *i) const |
std::string | getPseudoAsmFunctionName (cs_insn *insn) |
llvm::Function * | getPseudoAsmFunction (cs_insn *insn, llvm::FunctionType *type, const std::string &name="") |
llvm::Function * | getPseudoAsmFunction (cs_insn *insn, llvm::Type *retType, llvm::ArrayRef< llvm::Type * > params, const std::string &name="") |
void | translatePseudoAsmOp0Fnc (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0Op1 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp1 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0Op1 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0Op1Op2 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp1Op2 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0Op1Op2 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmFncOp0Op1Op2Op3 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp1Op2Op3 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0FncOp0Op1Op2Op3 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | translatePseudoAsmOp0Op1FncOp0Op1Op2Op3 (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
virtual uint8_t | getOperandAccess (cs_x86_op &op) |
virtual void | translatePseudoAsmGeneric (cs_insn *i, cs_x86 *ci, llvm::IRBuilder<> &irb) |
void | throwUnexpectedOperands (cs_insn *i, const std::string comment="") |
void | throwUnhandledInstructions (cs_insn *i, const std::string comment="") |
Protected Attributes | |
std::vector< uint32_t > | _reg2parentMap |
llvm::Value * | top = nullptr |
llvm::Value * | idx = nullptr |
llvm::Function * | _x87DataStoreFunction = nullptr |
llvm::Function * | _x87DataLoadFunction = nullptr |
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csh | _handle |
cs_arch | _arch |
cs_mode | _basicMode |
cs_mode | _extraMode |
cs_mode | _origBasicMode |
llvm::Module * | _module |
llvm::GlobalVariable * | _asm2llvmGv |
llvm::Function * | _callFunction |
llvm::Function * | _returnFunction |
llvm::Function * | _branchFunction |
llvm::Function * | _condBranchFunction |
llvm::GlobalValue::LinkageTypes | _regLt |
std::map< std::pair< std::string, llvm::FunctionType * >, llvm::Function * > | _insn2asmFunctions |
(fnc_name, fnc_type) -> fnc More... | |
std::set< llvm::Function * > | _asmFunctions |
std::map< uint32_t, std::string > | _reg2name |
std::map< uint32_t, llvm::Type * > | _reg2type |
std::map< llvm::GlobalVariable *, uint32_t > | _llvm2CapstoneRegs |
std::map< uint32_t, llvm::GlobalVariable * > | _capstone2LlvmRegs |
llvm::CallInst * | _branchGenerated |
bool | _inCondition |
llvm::Value * | op0 |
llvm::Value * | op1 |
llvm::Value * | op2 |
llvm::Value * | op3 |
cs_insn * | _insn |
Capstone instruction being currently translated. More... | |
std::set< unsigned int > | _callInsnIds |
std::set< unsigned int > | _returnInsnIds |
std::set< unsigned int > | _branchInsnIds |
std::set< unsigned int > | _condBranchInsnIds |
std::set< unsigned int > | _controlFlowInsnIds |
bool | _ignoreUnexpectedOperands |
bool | _ignoreUnhandledInstructions |
bool | _generatePseudoAsmFunctions |
Static Protected Attributes | |
static std::map< std::size_t, void(Capstone2LlvmIrTranslatorX86_impl::*)(cs_insn *i, cs_x86 *, llvm::IRBuilder<> &)> | _i2fm |
Mapping of Capstone instruction IDs to their translation functions. More... | |
Additional Inherited Members | |
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static std::unique_ptr< Capstone2LlvmIrTranslator > | createArch (cs_arch a, llvm::Module *m, cs_mode basic=CS_MODE_LITTLE_ENDIAN, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createArm (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createThumb (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createArm64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips3 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createMips32R6 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createX86_16 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createX86_32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createX86_64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createPpc32 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createPpc64 (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createPpcQpx (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createSparc (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createSysz (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
static std::unique_ptr< Capstone2LlvmIrTranslator > | createXcore (llvm::Module *m, cs_mode extra=CS_MODE_LITTLE_ENDIAN) |
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enum class | eOpConv |
retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86_impl::Capstone2LlvmIrTranslatorX86_impl | ( | llvm::Module * | m, |
cs_mode | basic = CS_MODE_32 , |
||
cs_mode | extra = CS_MODE_LITTLE_ENDIAN |
||
) |
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protected |
CF == 0 && ZF == 0 A - above NBE - not below or equal
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protected |
CF == 0 AE - above or equal NB - not below NC - not carry
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protected |
CF == 1 B - below C - carry NAE - not above or equal
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protected |
CF == 1 or ZF == 1 BE - below or equal NA - not above
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protected |
ZF == 1 E - equal Z - zero
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protected |
ZF == 0 and SF == OF G - greater NLE - not less or equal
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protected |
SF == OF GE - greater or equal NL - not less
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protected |
SF != OF L - less NGE - not greater or equal
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protected |
ZF == 1 or SF != OF LE - less or equal NG - not greater
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protected |
ZF == 0 NE - not equal NZ - not zero
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protected |
OF == 0 NO - not overflow
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protected |
PF == 0 NP - not parity PO - parity odd
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protected |
SF == 0 NS - not sign
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protected |
OF == 1 O - overflow
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protected |
PF == 1 P - parity PE - parity even
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protected |
SF == 1 S - sign
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overrideprotectedvirtual |
Generate LLVM data layout into the module. This is architecture and mode specific and must be implemented in concrete classes.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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overrideprotectedvirtual |
Generate architecture specific environment on top of common environment generated by generateEnvironment()
.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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protected |
The parity flag reflects the parity only of the least significant byte of the result, and is set if the number of set bits of ones is even.
(val & 1) (== 1) -> odd (val & 1) == 0 -> even
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overrideprotectedvirtual |
Generate LLVM global variables for registers. This is architecture and mode specific and must be implemented in concrete classes.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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protected |
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protected |
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protected |
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protected |
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protected |
SET_SFLAGS()
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protected |
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protected |
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protected |
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protected |
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protected |
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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protected |
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overrideprotectedvirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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protectedvirtual |
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overrideprotectedvirtual |
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overridevirtual |
All registers from the original Capstone x86_reg
should be in _reg2parentMap
. Our added registers are not there, but all of them should map to themselves, i.e. if register not in map, we return its number.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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protected |
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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overridevirtual |
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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overrideprotectedvirtual |
Do architecture and mode specific initialization on top of common initialization done by initialize()
;
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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overrideprotectedvirtual |
If possible, initialize _callInsnIds
, _returnInsnIds
, _branchInsnIds
, _condBranchInsnIds
, _condBranchInsnIds
sets.
For some architectures, it is not possible to initialize all the instructions that may generate control flow change. E.g. Any kind of ARM instruction that writes to PC is changing control flow.
This is not ideal, because each time some instruction that generates one of these is added, or removed, its ID must also be manualy added, or removed, here. This could be easily forgotten. Right now, I do not know how to solve this better (i.e. automatic update).
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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protected |
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protected |
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protected |
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protected |
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protected |
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overrideprotectedvirtual |
Initialize _reg2name
. See comment for _reg2name
to know what must be initialized, and what may or may not be initialized.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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overrideprotectedvirtual |
Initialize _reg2type
. See comment for _reg2type
to know what must be initialized, and what may or may not be initialized.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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overridevirtual |
x86 is special.
If the original basic mode was not set yet (CS_MODE_LITTLE_ENDIAN), this returns all the modes that can be used to initialize x86 translator.
If it was set, x86 allows to change basic mode only to modes lower than the original initialization mode an back to original mode (CS_MODE_16 < CS_MODE_32 < CS_MODE_64). This is because the original mode is used to initialize module's environment with registers and other specific features. It is possible to simulate lower modes in environments created for higher modes (e.g. get ax register from eax), but not the other way around (e.g. get rax from eax).
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Check if mode m
is an allowed extra mode for the translator. This must be implemented in concrete classes, since it is architecture and translator specific.
True
if mode is allowed, false
otherwise. Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator.
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overridevirtual |
Is the passed LLVM function f
any kind of pseudo function generated by capstone2llvmir (e.g. call/return/br/... function).
Reimplemented from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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overridevirtual |
Is the passed LLVM call c
any kind of pseudo call generated by capstone2llvmir (e.g. call/return/br/... function call).
Reimplemented from retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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overrideprotectedvirtual |
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overridevirtual |
Is the passed LLVM function f
the special pseudo function whose call represents a load of fp value from the x87 fpu stack slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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overridevirtual |
Is the passed LLVM call instruction c
a special pseudo call instruction representing a load of fp value from the x87 fpu stack slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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protected |
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overridevirtual |
Is the passed LLVM function f
the special pseudo function whose call represents a store of fp value to the x87 fpu stack slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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overridevirtual |
Is the passed LLVM call instruction c
a special pseudo call instruction representing a store of fp value to the x87 fpu stack slot?
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslatorX86.
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overrideprotectedvirtual |
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protected |
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protected |
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overrideprotectedvirtual |
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protected |
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protected |
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protected |
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protected |
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protected |
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protected |
This returns TOP value before the incrementation.
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overrideprotectedvirtual |
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overrideprotectedvirtual |
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protected |
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protected |
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protected |
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protected |
X86_INS_AAA, X86_INS_AAS
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protected |
X86_INS_AAD According to Ollydbg, CF, OF, and possibly AF are also set (undef in specs).
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protected |
X86_INS_AAM
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protected |
X86_INS_ADC, X86_INS_ADCX, X86_INS_ADOX http://stackoverflow.com/questions/29747508/what-is-the-difference-between-the-adc-and-adcx-instructions-on-ia32-ia64 X86_INS_ADC == X86_INS_ADCX : carry-in/out == CF X86_INS_ADOX : carry-in/out == OF
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protected |
X86_INS_ADD, X86_INS_XADD
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protected |
X86_INS_TEST, X86_INS_AND
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protected |
X86_INS_BSF, X86_INS_BSR
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protected |
X86_INS_BSWAP
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protected |
X86_INS_BT
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protected |
X86_INS_BTC
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protected |
X86_INS_BTR
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protected |
X86_INS_BTS
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protected |
X86_INS_CALL
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protected |
X86_INS_CBW
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protected |
X86_INS_CDQ
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protected |
X86_INS_CDQE
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protected |
X86_INS_CLC
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protected |
X86_INS_CLD
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protected |
X86_INS_CLI
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protected |
X86_INS_CMC
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protected |
X86_INS_CMOVAE, X86_INS_CMOVA, X86_INS_CMOVBE, X86_INS_CMOVB, X86_INS_CMOVE, X86_INS_CMOVGE, X86_INS_CMOVG, X86_INS_CMOVLE, X86_INS_CMOVL, X86_INS_CMOVNE, X86_INS_CMOVNO, X86_INS_CMOVNP, X86_INS_CMOVNS, X86_INS_CMOVO, X86_INS_CMOVP, X86_INS_CMOVS
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X86_INS_CMPXCHG cmpxchg accum={al, ax, eax}, op0, op1 if (accum == op0) then op0 <- op1 else accum <- op0
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X86_INS_CMPXCHG16B
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protected |
X86_INS_CMPXCHG8B
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protected |
X86_INS_CMPSB, X86_INS_CMPSW, X86_INS_CMPSD, X86_INS_CMPSQ TODO: rep variant is a strncmp-type operation, maybe we could convert it to such psuedo call. IDA does not do it (do while is generated) so maybe there is some problem.
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protected |
X86_INS_CPUID
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protected |
X86_INS_CQO
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protected |
X86_INS_CWD
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protected |
X86_INS_CWDE
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protected |
X86_INS_DAA, X86_INS_DAS
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protected |
X86_INS_DEC
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protected |
X86_INS_DIV, X86_INS_IDIV
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protected |
X86_INS_ENTER
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protected |
X86_INS_F2XM1
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protected |
X86_INS_FABS
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protected |
X86_INS_FADD, X86_INS_FADDP, X86_INS_FIADD
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protected |
X86_INS_FPATAN
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protected |
X86_INS_FBLD
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protected |
X86_INS_FBSTP
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protected |
X86_INS_FCHS
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protected |
X86_INS_FCMOVB, X86_INS_FCMOVE, X86_INS_FCMOVBE, X86_INS_FCMOVU, X86_INS_FCMOVNB, X86_INS_FCMOVNE, X86_INS_FCMOVNBE, X86_INS_FCMOVNU
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protected |
X86_INS_FCOS
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protected |
X86_INS_FDECSTP
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protected |
X86_INS_FDIV, X86_INS_FDIVP, X86_INS_FIDIV
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protected |
X86_INS_FDIVR, X86_INS_FDIVRP, X86_INS_FIDIVR
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protected |
X86_INS_FFREE
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protected |
X86_INS_FINCSTP
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protected |
X86_INS_FIST, X86_INS_FISTP, X86_INS_FISTPP
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protected |
X86_INS_FLD, X86_INS_FILD
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protected |
X86_INS_FLD1, X86_INS_FLDL2T, X86_INS_FLDL2E, X86_INS_FLDPI, X86_INS_FLDLG2, X86_INS_FLDLN2, X86_INS_FLDZ
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protected |
X86_INS_FMUL, X86_INS_FMULP, X86_INS_FIMUL
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protected |
X86_INS_FNCLEX
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protected |
X86_INS_FNINIT This was modeled as empty (nop) instruction in an old semantics, but it does set some values. Not all of the set objects are represented in our current environment, and therefore we are not able to set them all.
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protected |
X86_INS_FNSAVE
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protected |
X86_INS_FNSTENV
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protected |
X86_INS_FNSTSW
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protected |
X86_INS_FPREM, X86_INS_FPREM1
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protected |
X86_INS_FRNDINT
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protected |
X86_INS_FRSTOR
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protected |
X86_INS_FSCALE
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protected |
X86_INS_FSIN
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protected |
X86_INS_FSINCOS
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protected |
X86_INS_FSQRT
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protected |
X86_INS_FST, X86_INS_FSTP
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protected |
X86_INS_FSUB, X86_INS_FSUBP, X86_INS_FISUB
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protected |
X86_INS_FSUBR, X86_INS_FSUBRP, X86_INS_FISUBR
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protected |
X86_INS_FPTAN
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protected |
X86_INS_FUCOM, X86_INS_FUCOMP, X86_INS_FUCOMPP X86_INS_FCOM, X86_INS_FCOMP, X86_INS_FCOMPP X86_INS_FUCOMI, X86_INS_FUCOMIP X86_INS_FCOMI, X86_INS_FCOMIP X86_INS_FTST X86_INS_FICOM, X86_INS_FICOMP
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X86_INS_FXAM
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protected |
X86_INS_FXCH
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X86_INS_FXSAVE, X86_INS_FXSAVE64
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X86_INS_FXRSTOR, X86_INS_FXRSTOR64
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X86_INS_FXTRACT
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X86_INS_FYL2X, X86_INS_FYL2X1
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X86_INS_IMUL
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X86_INS_INC
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X86_INS_INSB, X86_INS_INSW, X86_INS_INSD
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Translate single Capstone instruction.
Implements retdec::capstone2llvmir::Capstone2LlvmIrTranslator_impl< cs_x86, cs_x86_op >.
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X86_INS_JAE, X86_INS_JA, X86_INS_JBE, X86_INS_JB, X86_INS_JE, X86_INS_JGE, X86_INS_JG, X86_INS_JLE, X86_INS_JL, X86_INS_JNE, X86_INS_JNO, X86_INS_JNP, X86_INS_JNS, X86_INS_JO, X86_INS_JP, X86_INS_JS
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X86_INS_JCXZ, X86_INS_JECXZ, X86_INS_JRCXZ
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X86_INS_JMP
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X86_INS_LAHF
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X86_INS_LCALL e.g. lcall ptr [ecx + 0x78563412]
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X86_INS_LEA
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X86_INS_LEAVE
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X86_INS_LJMP
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X86_INS_LDS, X86_INS_LES, X86_INS_LFS, X86_INS_LGS, X86_INS_LSS There is some more shit going on when instruction executed in protected mode.
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X86_INS_LODSB, X86_INS_LODSW, X86_INS_LODSD, X86_INS_LODSQ
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X86_INS_LOOP, X86_INS_LOOPE (LOOPZ), X86_INS_LOOPNE (LOOPNZ)
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X86_INS_MOV, X86_INS_MOVSX, X86_INS_MOVSXD, X86_INS_MOVZX, X86_INS_MOVABS
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X86_INS_MOVSB, X86_INS_MOVSW, X86_INS_MOVSD, X86_INS_MOVSQ
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X86_INS_MUL, X86_INS_IMUL (only unary form)
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X86_INS_NEG
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X86_INS_NOP, X86_INS_UD2, X86_INS_UD2B, X86_INS_FNOP, X86_INS_FDISI8087_NOP, X86_INS_FENI8087_NOP
X86_INS_FNSTCW - ignore FPU control word store. X86_INS_FLDCW - ignore FPU control word load.
Complete list from the old semantics: IRETD, IRET, STI, CLI, VERR, VERW, LMSW, LTR, SMSW, CLTS, INVD, LOCK, RSM, RDMSR, WRMSR, RDPMC, SYSENTER, SYSEXIT, XGETBV, LAR, LSL, INVPCID, SLDT, LLDT, SGDT, SIDT, LGDT, LIDT, XSAVE, XRSTOR, XSAVEOPT, INVLPG, FLDENV, ARPL, STR, FWAIT, FNOP
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X86_INS_NOT
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X86_INS_OR
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X86_INS_OUTSB, X86_INS_OUTSD, X86_INS_OUTSW
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X86_INS_POP
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X86_INS_POPAL == POPAD (32-bit), X86_INS_POPAW == POPA (16-bit)
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X86_INS_POPF, X86_INS_POPFD, X86_INS_POPFQ This currently does only what original model did. The operations are more complicated, setting of some flags is conditoned by some runtime CPU modes. I don't know if we can/need to solve this.
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X86_INS_PUSH
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X86_INS_PUSHAL = PUSHAD (32-bit), X86_INS_PUSHAW = PUSHA (16-bit)
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X86_INS_PUSHF, X86_INS_PUSHFD, X86_INS_PUSHFQ See translatePopEflags()
comment.
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X86_INS_RCL
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X86_INS_RCR
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X86_INS_RDTSC
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X86_INS_RDTSCP
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X86_INS_RET, X86_INS_RETF, X86_INS_RETFQ
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X86_INS_ROL
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X86_INS_ROR
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X86_INS_SAHF
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X86_INS_SALC
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X86_INS_SBB op0 = op0 - (op1 + CF)
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X86_INS_SCASB, X86_INS_SCASW, X86_INS_SCASD, X86_INS_SCASQ TODO: rep variant is a strchr-type operation, maybe we could convert it to such psuedo call. IDA does not do it (do while is generated) so maybe there is some problem. TODO: this is strlen only if (according to IDA):
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X86_INS_SETAE, X86_INS_SETA, X86_INS_SETBE, X86_INS_SETB, X86_INS_SETE, X86_INS_SETGE, X86_INS_SETG, X86_INS_SETLE, X86_INS_SETL, X86_INS_SETNE, X86_INS_SETNO, X86_INS_SETNP, X86_INS_SETNS, X86_INS_SETO, X86_INS_SETP, X86_INS_SETS
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X86_INS_SHL == X86_INS_SAL
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X86_INS_SHR, X86_INS_SAR
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X86_INS_SHLD
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X86_INS_SHRD
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X86_INS_STC
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X86_INS_STD
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X86_INS_STOSB, X86_INS_STOSW, X86_INS_STOSD, X86_INS_STOSQ
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X86_INS_SUB, X86_INS_CMP
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X86_INS_XCHG
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X86_INS_XLATB
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X86_INS_XOR
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Mapping of Capstone instruction IDs to their translation functions.
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Maps register numbers to numbers of their parents depending on the original basic mode (e.g. X86_REG_AH to X86_REG_EAX in 32-bit mode, or to X86_REG_RAX in 64-bit mode). Unhandled mappings are set to X86_REG_INVALID (e.g. mapping of X86_REG_EAX in 16-bit mode). Once generated, it does not change. Register's number is a key into the array of parent number values. Only values of the Capstone's original x86_reg
enum are handled, our added enums (e.g. x86_reg_rflags
) are not. Always use getParentRegister()
method to get values from this map – it will deal with added enums.
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