Function core::arch::mips64::__msa_fcor_d
source · pub unsafe fn __msa_fcor_d(a: v2f64, b: v2f64) -> v2i64
🔬This is a nightly-only experimental API. (
stdsimd
#48556)Available on (MIPS or MIPS-64) and target feature
msa
and MIPS-64 only.Expand description
Vector Floating-Point Quiet Compare Ordered
Set all bits to 1 in vector (two signed 64-bit integer numbers)
elements if the corresponding a
(two 64-bit floating point numbers) and
b
(two 64-bit floating point numbers) elements are ordered, i.e. both elements are not NaN values,
otherwise set all bits to 0.