🔬This is a nightly-only experimental API. (
stdsimd
#27731)Available on MIPS only.
Expand description
Platform-specific intrinsics for the mips
platform.
See the module documentation for more details.
Structs
Functions
- Vector Add Absolute Values.
- Vector Add Absolute Values
- Vector Add Absolute Values
- Vector Add Absolute Values
- Signed Saturated Vector Saturated Add of Absolute Values
- Vector Saturated Add of Absolute Values
- Vector Saturated Add of Absolute Values
- Vector Saturated Add of Absolute Values
- Vector Signed Saturated Add of Signed Values
- Vector Signed Saturated Add of Signed Values
- Vector Signed Saturated Add of Signed Values
- Vector Signed Saturated Add of Signed Values
- Vector Unsigned Saturated Add of Unsigned Values
- Vector Unsigned Saturated Add of Unsigned Values
- Vector Unsigned Saturated Add of Unsigned Values
- Vector Unsigned Saturated Add of Unsigned Values
- Vector Add
- Vector Add
- Vector Add
- Vector Add
- Immediate Add
- Immediate Add
- Immediate Add
- Immediate Add
- Vector Logical And
- Immediate Logical And
- Vector Absolute Values of Signed Subtract
- Vector Absolute Values of Signed Subtract
- Vector Absolute Values of Signed Subtract
- Vector Absolute Values of Signed Subtract
- Vector Absolute Values of Unsigned Subtract
- Vector Absolute Values of Unsigned Subtract
- Vector Absolute Values of Unsigned Subtract
- Vector Absolute Values of Unsigned Subtract
- Vector Signed Average
- Vector Signed Average
- Vector Signed Average
- Vector Signed Average
- Vector Unsigned Average
- Vector Unsigned Average
- Vector Unsigned Average
- Vector Unsigned Average
- Vector Signed Average Rounded
- Vector Signed Average Rounded
- Vector Signed Average Rounded
- Vector Signed Average Rounded
- Vector Unsigned Average Rounded
- Vector Unsigned Average Rounded
- Vector Unsigned Average Rounded
- Vector Unsigned Average Rounded
- Vector Bit Clear
- Vector Bit Clear
- Vector Bit Clear
- Vector Bit Clear
- Immediate Bit Clear
- Immediate Bit Clear
- Immediate Bit Clear
- Immediate Bit Clear
- Vector Bit Insert Left
- Vector Bit Insert Left
- Vector Bit Insert Left
- Vector Bit Insert Left
- Immediate Bit Insert Left
- Immediate Bit Insert Left
- Immediate Bit Insert Left
- Immediate Bit Insert Left
- Vector Bit Insert Right
- Vector Bit Insert Right
- Vector Bit Insert Right
- Vector Bit Insert Right
- Immediate Bit Insert Right
- Immediate Bit Insert Right
- Immediate Bit Insert Right
- Immediate Bit Insert Right
- Vector Bit Move If Not Zero
- Immediate Bit Move If Not Zero
- Vector Bit Move If Zero
- Immediate Bit Move If Zero
- Vector Bit Negate
- Vector Bit Negate
- Vector Bit Negate
- Vector Bit Negate
- Immediate Bit Negate
- Immediate Bit Negate
- Immediate Bit Negate
- Immediate Bit Negate
- Immediate Branch If All Elements Are Not Zero
- Immediate Branch If All Elements Are Not Zero
- Immediate Branch If All Elements Are Not Zero
- Immediate Branch If Not Zero (At Least One Element of Any Format Is Not Zero)
- Immediate Branch If All Elements Are Not Zero
- Vector Bit Select
- Immediate Bit Select
- Vector Bit Set
- Vector Bit Set
- Vector Bit Set
- Vector Bit Set
- Immediate Bit Set
- Immediate Bit Set
- Immediate Bit Set
- Immediate Bit Set
- Immediate Branch If At Least One Element Is Zero
- Immediate Branch If At Least One Element Is Zero
- Immediate Branch If At Least One Element Is Zero
- Immediate Branch If Zero (All Elements of Any Format Are Zero)
- Immediate Branch If At Least One Element Is Zero
- Vector Compare Equal
- Vector Compare Equal
- Vector Compare Equal
- Vector Compare Equal
- Immediate Compare Equal
- Immediate Compare Equal
- Immediate Compare Equal
- Immediate Compare Equal
- GPR Copy from MSA Control Register
- Vector Compare Signed Less Than or Equal
- Vector Compare Signed Less Than or Equal
- Vector Compare Signed Less Than or Equal
- Vector Compare Signed Less Than or Equal
- Vector Compare Unsigned Less Than or Equal
- Vector Compare Unsigned Less Than or Equal
- Vector Compare Unsigned Less Than or Equal
- Vector Compare Unsigned Less Than or Equal
- Immediate Compare Signed Less Than or Equal
- Immediate Compare Signed Less Than or Equal
- Immediate Compare Signed Less Than or Equal
- Immediate Compare Signed Less Than or Equal
- Immediate Compare Unsigned Less Than or Equal
- Immediate Compare Unsigned Less Than or Equal
- Immediate Compare Unsigned Less Than or Equal
- Immediate Compare Unsigned Less Than or Equal
- Vector Compare Signed Less Than
- Vector Compare Signed Less Than
- Vector Compare Signed Less Than
- Vector Compare Signed Less Than
- Vector Compare Unsigned Less Than
- Vector Compare Unsigned Less Than
- Vector Compare Unsigned Less Than
- Vector Compare Unsigned Less Than
- Immediate Compare Signed Less Than
- Immediate Compare Signed Less Than
- Immediate Compare Signed Less Than
- Immediate Compare Signed Less Than
- Immediate Compare Unsigned Less Than
- Immediate Compare Unsigned Less Than
- Immediate Compare Unsigned Less Than
- Immediate Compare Unsigned Less Than
- Element Copy to GPR Signed
- Element Copy to GPR Signed
- Element Copy to GPR Signed
- Element Copy to GPR Signed
- Element Copy to GPR Unsigned
- Element Copy to GPR Unsigned
- Element Copy to GPR Unsigned
- Element Copy to GPR Unsigned
- GPR Copy to MSA Control Register
- Vector Signed Divide
- Vector Signed Divide
- Vector Signed Divide
- Vector Signed Divide
- Vector Unsigned Divide
- Vector Unsigned Divide
- Vector Unsigned Divide
- Vector Unsigned Divide
- Vector Signed Dot Product
- Vector Signed Dot Product
- Vector Signed Dot Product
- Vector Unsigned Dot Product
- Vector Unsigned Dot Product
- Vector Unsigned Dot Product
- Vector Signed Dot Product and Add
- Vector Signed Dot Product and Add
- Vector Signed Dot Product and Add
- Vector Unsigned Dot Product and Add
- Vector Unsigned Dot Product and Add
- Vector Unsigned Dot Product and Add
- Vector Signed Dot Product and Add
- Vector Signed Dot Product and Add
- Vector Signed Dot Product and Add
- Vector Unsigned Dot Product and Add
- Vector Unsigned Dot Product and Add
- Vector Unsigned Dot Product and Add
- Vector Floating-Point Addition
- Vector Floating-Point Addition
- Vector Floating-Point Quiet Compare Always False
- Vector Floating-Point Quiet Compare Always False
- Vector Floating-Point Quiet Compare Equal
- Vector Floating-Point Quiet Compare Equal
- Vector Floating-Point Class Mask
- Vector Floating-Point Class Mask
- Vector Floating-Point Quiet Compare Less or Equal
- Vector Floating-Point Quiet Compare Less or Equal
- Vector Floating-Point Quiet Compare Less Than
- Vector Floating-Point Quiet Compare Less Than
- Vector Floating-Point Quiet Compare Not Equal
- Vector Floating-Point Quiet Compare Not Equal
- Vector Floating-Point Quiet Compare Ordered
- Vector Floating-Point Quiet Compare Ordered
- Vector Floating-Point Quiet Compare Unordered or Equal
- Vector Floating-Point Quiet Compare Unordered or Equal
- Vector Floating-Point Quiet Compare Unordered or Less or Equal
- Vector Floating-Point Quiet Compare Unordered or Less or Equal
- Vector Floating-Point Quiet Compare Unordered or Less Than
- Vector Floating-Point Quiet Compare Unordered or Less Than
- Vector Floating-Point Quiet Compare Unordered
- Vector Floating-Point Quiet Compare Unordered
- Vector Floating-Point Quiet Compare Unordered or Not Equal
- Vector Floating-Point Quiet Compare Unordered or Not Equal
- Vector Floating-Point Division
- Vector Floating-Point Division
- Vector Floating-Point Down-Convert Interchange Format
- Vector Floating-Point Down-Convert Interchange Format
- Vector Floating-Point Down-Convert Interchange Format
- Vector Floating-Point Up-Convert Interchange Format Left
- Vector Floating-Point Up-Convert Interchange Format Left
- Vector Floating-Point Round and Convert from Signed Integer
- Vector Floating-Point Round and Convert from Signed Integer
- Vector Floating-Point Round and Convert from Unsigned Integer
- Vector Floating-Point Round and Convert from Unsigned Integer
- Vector Floating-Point Convert from Fixed-Point Left
- Vector Floating-Point Convert from Fixed-Point Left
- Vector Floating-Point Convert from Fixed-Point Left
- Vector Floating-Point Convert from Fixed-Point Left
- Vector Fill from GPR
- Vector Fill from GPR
- Vector Fill from GPR
- Vector Fill from GPR
- Vector Floating-Point Base 2 Logarithm
- Vector Floating-Point Base 2 Logarithm
- Vector Floating-Point Multiply-Add
- Vector Floating-Point Multiply-Add
- Vector Floating-Point Maximum Based on Absolute Values
- Vector Floating-Point Maximum Based on Absolute Values
- Vector Floating-Point Maximum
- Vector Floating-Point Maximum
- Vector Floating-Point Minimum Based on Absolute Values
- Vector Floating-Point Minimum Based on Absolute Values
- Vector Floating-Point Minimum
- Vector Floating-Point Minimum
- Vector Floating-Point Multiply-Sub
- Vector Floating-Point Multiply-Sub
- Vector Floating-Point Multiplication
- Vector Floating-Point Multiplication
- Vector Approximate Floating-Point Reciprocal
- Vector Approximate Floating-Point Reciprocal
- Vector Floating-Point Round to Integer
- Vector Floating-Point Round to Integer
- Vector Approximate Floating-Point Reciprocal of Square Root
- Vector Approximate Floating-Point Reciprocal of Square Root
- Vector Floating-Point Signaling Compare Always False
- Vector Floating-Point Signaling Compare Always False
- Vector Floating-Point Signaling Compare Equal
- Vector Floating-Point Signaling Compare Equal
- Vector Floating-Point Signaling Compare Less or Equal
- Vector Floating-Point Signaling Compare Less or Equal
- Vector Floating-Point Signaling Compare Less Than
- Vector Floating-Point Signaling Compare Less Than
- Vector Floating-Point Signaling Compare Not Equal
- Vector Floating-Point Signaling Compare Not Equal
- Vector Floating-Point Signaling Compare Ordered
- Vector Floating-Point Signaling Compare Ordered
- Vector Floating-Point Square Root
- Vector Floating-Point Square Root
- Vector Floating-Point Subtraction
- Vector Floating-Point Subtraction
- Vector Floating-Point Signaling Compare Ordered
- Vector Floating-Point Signaling Compare Ordered
- Vector Floating-Point Signaling Compare Unordered or Less or Equal
- Vector Floating-Point Signaling Compare Unordered or Less or Equal
- Vector Floating-Point Signaling Compare Unordered or Less Than
- Vector Floating-Point Signaling Compare Unordered or Less Than
- Vector Floating-Point Signaling Compare Unordered
- Vector Floating-Point Signaling Compare Unordered
- Vector Floating-Point Signaling Compare Unordered or Not Equal
- Vector Floating-Point Signaling Compare Unordered or Not Equal
- Vector Floating-Point Convert to Signed Integer
- Vector Floating-Point Convert to Signed Integer
- Vector Floating-Point Convert to Unsigned Integer
- Vector Floating-Point Convert to Unsigned Integer
- Vector Floating-Point Convert to Fixed-Point
- Vector Floating-Point Convert to Fixed-Point
- Vector Floating-Point Truncate and Convert to Signed Integer
- Vector Floating-Point Truncate and Convert to Signed Integer
- Vector Floating-Point Truncate and Convert to Unsigned Integer
- Vector Floating-Point Truncate and Convert to Unsigned Integer
- Vector Signed Horizontal Add
- Vector Signed Horizontal Add
- Vector Signed Horizontal Add
- Vector Unsigned Horizontal Add
- Vector Unsigned Horizontal Add
- Vector Unsigned Horizontal Add
- Vector Signed Horizontal Subtract
- Vector Signed Horizontal Subtract
- Vector Signed Horizontal Subtract
- Vector Unsigned Horizontal Subtract
- Vector Unsigned Horizontal Subtract
- Vector Unsigned Horizontal Subtract
- Vector Interleave Even
- Vector Interleave Even
- Vector Interleave Even
- Vector Interleave Even
- Vector Interleave Left
- Vector Interleave Left
- Vector Interleave Left
- Vector Interleave Left
- Vector Interleave Odd
- Vector Interleave Odd
- Vector Interleave Odd
- Vector Interleave Odd
- Vector Interleave Right
- Vector Interleave Right
- Vector Interleave Right
- Vector Interleave Right
- GPR Insert Element
- GPR Insert Element
- GPR Insert Element
- GPR Insert Element
- Element Insert Element
- Element Insert Element
- Element Insert Element
- Element Insert Element
- Vector Load
- Vector Load
- Vector Load
- Vector Load
- Immediate Load
- Immediate Load
- Immediate Load
- Immediate Load
- Vector Fixed-Point Multiply and Add
- Vector Fixed-Point Multiply and Add
- Vector Fixed-Point Multiply and Add Rounded
- Vector Fixed-Point Multiply and Add Rounded
- Vector Multiply and Add
- Vector Multiply and Add
- Vector Multiply and Add
- Vector Multiply and Add
- Vector Maximum Based on Absolute Values
- Vector Maximum Based on Absolute Values
- Vector Maximum Based on Absolute Values
- Vector Maximum Based on Absolute Values
- Vector Signed Maximum
- Vector Signed Maximum
- Vector Signed Maximum
- Vector Signed Maximum
- Vector Unsigned Maximum
- Vector Unsigned Maximum
- Vector Unsigned Maximum
- Vector Unsigned Maximum
- Immediate Signed Maximum
- Immediate Signed Maximum
- Immediate Signed Maximum
- Immediate Signed Maximum
- Immediate Unsigned Maximum
- Immediate Unsigned Maximum
- Immediate Unsigned Maximum
- Immediate Unsigned Maximum
- Vector Minimum Based on Absolute Value
- Vector Minimum Based on Absolute Value
- Vector Minimum Based on Absolute Value
- Vector Minimum Based on Absolute Value
- Vector Signed Minimum
- Vector Signed Minimum
- Vector Signed Minimum
- Vector Signed Minimum
- Vector Unsigned Minimum
- Vector Unsigned Minimum
- Vector Unsigned Minimum
- Vector Unsigned Minimum
- Immediate Signed Minimum
- Immediate Signed Minimum
- Immediate Signed Minimum
- Immediate Signed Minimum
- Immediate Unsigned Minimum
- Immediate Unsigned Minimum
- Immediate Unsigned Minimum
- Immediate Unsigned Minimum
- Vector Signed Modulo
- Vector Signed Modulo
- Vector Signed Modulo
- Vector Signed Modulo
- Vector Unsigned Modulo
- Vector Unsigned Modulo
- Vector Unsigned Modulo
- Vector Unsigned Modulo
- Vector Move
- Vector Fixed-Point Multiply and Subtract
- Vector Fixed-Point Multiply and Subtract
- Vector Fixed-Point Multiply and Subtract Rounded
- Vector Fixed-Point Multiply and Subtract Rounded
- Vector Multiply and Subtract
- Vector Multiply and Subtract
- Vector Multiply and Subtract
- Vector Multiply and Subtract
- Vector Fixed-Point Multiply
- Vector Fixed-Point Multiply
- Vector Fixed-Point Multiply Rounded
- Vector Fixed-Point Multiply Rounded
- Vector Multiply
- Vector Multiply
- Vector Multiply
- Vector Multiply
- Vector Leading Ones Count
- Vector Leading Ones Count
- Vector Leading Ones Count
- Vector Leading Ones Count
- Vector Leading Zeros Count
- Vector Leading Zeros Count
- Vector Leading Zeros Count
- Vector Leading Zeros Count
- Vector Logical Negated Or
- Immediate Logical Negated Or
- Vector Logical Or
- Immediate Logical Or
- Vector Pack Even
- Vector Pack Even
- Vector Pack Even
- Vector Pack Even
- Vector Pack Odd
- Vector Pack Odd
- Vector Pack Odd
- Vector Pack Odd
- Vector Population Count
- Vector Population Count
- Vector Population Count
- Vector Population Count
- Immediate Signed Saturate
- Immediate Signed Saturate
- Immediate Signed Saturate
- Immediate Signed Saturate
- Immediate Unsigned Saturate
- Immediate Unsigned Saturate
- Immediate Unsigned Saturate
- Immediate Unsigned Saturate
- Immediate Set Shuffle Elements
- Immediate Set Shuffle Elements
- Immediate Set Shuffle Elements
- GPR Columns Slide
- GPR Columns Slide
- GPR Columns Slide
- GPR Columns Slide
- Immediate Columns Slide
- Immediate Columns Slide
- Immediate Columns Slide
- Immediate Columns Slide
- Vector Shift Left
- Vector Shift Left
- Vector Shift Left
- Vector Shift Left
- Immediate Shift Left
- Immediate Shift Left
- Immediate Shift Left
- Immediate Shift Left
- GPR Element Splat
- GPR Element Splat
- GPR Element Splat
- GPR Element Splat
- Immediate Element Splat
- Immediate Element Splat
- Immediate Element Splat
- Immediate Element Splat
- Vector Shift Right Arithmetic
- Vector Shift Right Arithmetic
- Vector Shift Right Arithmetic
- Vector Shift Right Arithmetic
- Immediate Shift Right Arithmetic
- Immediate Shift Right Arithmetic
- Immediate Shift Right Arithmetic
- Immediate Shift Right Arithmetic
- Vector Shift Right Arithmetic Rounded
- Vector Shift Right Arithmetic Rounded
- Vector Shift Right Arithmetic Rounded
- Vector Shift Right Arithmetic Rounded
- Immediate Shift Right Arithmetic Rounded
- Immediate Shift Right Arithmetic Rounded
- Immediate Shift Right Arithmetic Rounded
- Immediate Shift Right Arithmetic Rounded
- Vector Shift Right Logical
- Vector Shift Right Logical
- Vector Shift Right Logical
- Vector Shift Right Logical
- Immediate Shift Right Logical
- Immediate Shift Right Logical
- Immediate Shift Right Logical
- Immediate Shift Right Logical
- Vector Shift Right Logical Rounded
- Vector Shift Right Logical Rounded
- Vector Shift Right Logical Rounded
- Vector Shift Right Logical Rounded
- Immediate Shift Right Logical Rounded
- Immediate Shift Right Logical Rounded
- Immediate Shift Right Logical Rounded
- Immediate Shift Right Logical Rounded
- Vector Store
- Vector Store
- Vector Store
- Vector Store
- Vector Signed Saturated Subtract of Signed Values
- Vector Signed Saturated Subtract of Signed Values
- Vector Signed Saturated Subtract of Signed Values
- Vector Signed Saturated Subtract of Signed Values
- Vector Unsigned Saturated Subtract of Unsigned Values
- Vector Unsigned Saturated Subtract of Unsigned Values
- Vector Unsigned Saturated Subtract of Unsigned Values
- Vector Unsigned Saturated Subtract of Unsigned Values
- Vector Unsigned Saturated Subtract of Signed from Unsigned
- Vector Unsigned Saturated Subtract of Signed from Unsigned
- Vector Unsigned Saturated Subtract of Signed from Unsigned
- Vector Unsigned Saturated Subtract of Signed from Unsigned
- Vector Signed Saturated Subtract of Unsigned Values
- Vector Signed Saturated Subtract of Unsigned Values
- Vector Signed Saturated Subtract of Unsigned Values
- Vector Signed Saturated Subtract of Unsigned Values
- Vector Subtract
- Vector Subtract
- Vector Subtract
- Vector Subtract
- Immediate Subtract
- Immediate Subtract
- Immediate Subtract
- Immediate Subtract
- Vector Data Preserving Shuffle
- Vector Data Preserving Shuffle
- Vector Data Preserving Shuffle
- Vector Data Preserving Shuffle
- Vector Logical Exclusive Or
- Immediate Logical Exclusive Or
- Generates the trap instruction
BREAK