Function core::arch::mips64::__msa_fsaf_w

source ·
pub unsafe fn __msa_fsaf_w(a: v4f32, b: v4f32) -> v4i32
🔬This is a nightly-only experimental API. (stdsimd #48556)
Available on (MIPS or MIPS-64) and target feature msa and MIPS-64 only.
Expand description

Vector Floating-Point Signaling Compare Always False

Set all bits to 0 in vector (four signed 32-bit integer numbers) elements. Signaling and quiet NaN elements in vector a (four 32-bit floating point numbers) or b (four 32-bit floating point numbers) signal Invalid Operation exception. In case of a floating-point exception, the default result has all bits set to 0.