Module core::arch::mips64

source ·
🔬This is a nightly-only experimental API. (stdsimd #27731)
Available on MIPS-64 only.
Expand description

Platform-specific intrinsics for the mips64 platform.

See the module documentation for more details.

Structs§

  • v2f64ExperimentalMIPS or MIPS-64
  • v2i64ExperimentalMIPS or MIPS-64
  • v2u64ExperimentalMIPS or MIPS-64
  • v4f32ExperimentalMIPS or MIPS-64
  • v4i32ExperimentalMIPS or MIPS-64
  • v4u32ExperimentalMIPS or MIPS-64
  • v8i16ExperimentalMIPS or MIPS-64
  • v8u16ExperimentalMIPS or MIPS-64
  • v16i8ExperimentalMIPS or MIPS-64
  • v16u8ExperimentalMIPS or MIPS-64

Functions§

  • __msa_add_a_bExperimental(MIPS or MIPS-64) and msa
    Vector Add Absolute Values.
  • __msa_add_a_dExperimental(MIPS or MIPS-64) and msa
    Vector Add Absolute Values
  • __msa_add_a_hExperimental(MIPS or MIPS-64) and msa
    Vector Add Absolute Values
  • __msa_add_a_wExperimental(MIPS or MIPS-64) and msa
    Vector Add Absolute Values
  • __msa_adds_a_bExperimental(MIPS or MIPS-64) and msa
    Signed Saturated Vector Saturated Add of Absolute Values
  • __msa_adds_a_dExperimental(MIPS or MIPS-64) and msa
    Vector Saturated Add of Absolute Values
  • __msa_adds_a_hExperimental(MIPS or MIPS-64) and msa
    Vector Saturated Add of Absolute Values
  • __msa_adds_a_wExperimental(MIPS or MIPS-64) and msa
    Vector Saturated Add of Absolute Values
  • __msa_adds_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Add of Signed Values
  • __msa_adds_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Add of Signed Values
  • __msa_adds_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Add of Signed Values
  • __msa_adds_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Add of Signed Values
  • __msa_adds_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Add of Unsigned Values
  • __msa_adds_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Add of Unsigned Values
  • __msa_adds_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Add of Unsigned Values
  • __msa_adds_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Add of Unsigned Values
  • __msa_addv_bExperimental(MIPS or MIPS-64) and msa
    Vector Add
  • __msa_addv_dExperimental(MIPS or MIPS-64) and msa
    Vector Add
  • __msa_addv_hExperimental(MIPS or MIPS-64) and msa
    Vector Add
  • __msa_addv_wExperimental(MIPS or MIPS-64) and msa
    Vector Add
  • __msa_addvi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Add
  • __msa_addvi_dExperimental(MIPS or MIPS-64) and msa
    Immediate Add
  • __msa_addvi_hExperimental(MIPS or MIPS-64) and msa
    Immediate Add
  • __msa_addvi_wExperimental(MIPS or MIPS-64) and msa
    Immediate Add
  • __msa_and_vExperimental(MIPS or MIPS-64) and msa
    Vector Logical And
  • __msa_andi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Logical And
  • __msa_asub_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Signed Subtract
  • __msa_asub_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Signed Subtract
  • __msa_asub_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Signed Subtract
  • __msa_asub_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Signed Subtract
  • __msa_asub_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Unsigned Subtract
  • __msa_asub_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Unsigned Subtract
  • __msa_asub_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Unsigned Subtract
  • __msa_asub_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Absolute Values of Unsigned Subtract
  • __msa_ave_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average
  • __msa_ave_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average
  • __msa_ave_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average
  • __msa_ave_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average
  • __msa_ave_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average
  • __msa_ave_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average
  • __msa_ave_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average
  • __msa_ave_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average
  • __msa_aver_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average Rounded
  • __msa_aver_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average Rounded
  • __msa_aver_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average Rounded
  • __msa_aver_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Average Rounded
  • __msa_aver_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average Rounded
  • __msa_aver_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average Rounded
  • __msa_aver_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average Rounded
  • __msa_aver_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Average Rounded
  • __msa_bclr_bExperimental(MIPS or MIPS-64) and msa
    Vector Bit Clear
  • __msa_bclr_dExperimental(MIPS or MIPS-64) and msa
    Vector Bit Clear
  • __msa_bclr_hExperimental(MIPS or MIPS-64) and msa
    Vector Bit Clear
  • __msa_bclr_wExperimental(MIPS or MIPS-64) and msa
    Vector Bit Clear
  • __msa_bclri_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Clear
  • __msa_bclri_dExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Clear
  • __msa_bclri_hExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Clear
  • __msa_bclri_wExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Clear
  • __msa_binsl_bExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Left
  • __msa_binsl_dExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Left
  • __msa_binsl_hExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Left
  • __msa_binsl_wExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Left
  • __msa_binsli_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Left
  • __msa_binsli_dExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Left
  • __msa_binsli_hExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Left
  • __msa_binsli_wExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Left
  • __msa_binsr_bExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Right
  • __msa_binsr_dExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Right
  • __msa_binsr_hExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Right
  • __msa_binsr_wExperimental(MIPS or MIPS-64) and msa
    Vector Bit Insert Right
  • __msa_binsri_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Right
  • __msa_binsri_dExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Right
  • __msa_binsri_hExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Right
  • __msa_binsri_wExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Insert Right
  • __msa_bmnz_vExperimental(MIPS or MIPS-64) and msa
    Vector Bit Move If Not Zero
  • __msa_bmnzi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Move If Not Zero
  • __msa_bmz_vExperimental(MIPS or MIPS-64) and msa
    Vector Bit Move If Zero
  • __msa_bmzi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Move If Zero
  • __msa_bneg_bExperimental(MIPS or MIPS-64) and msa
    Vector Bit Negate
  • __msa_bneg_dExperimental(MIPS or MIPS-64) and msa
    Vector Bit Negate
  • __msa_bneg_hExperimental(MIPS or MIPS-64) and msa
    Vector Bit Negate
  • __msa_bneg_wExperimental(MIPS or MIPS-64) and msa
    Vector Bit Negate
  • __msa_bnegi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Negate
  • __msa_bnegi_dExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Negate
  • __msa_bnegi_hExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Negate
  • __msa_bnegi_wExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Negate
  • __msa_bnz_bExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If All Elements Are Not Zero
  • __msa_bnz_dExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If All Elements Are Not Zero
  • __msa_bnz_hExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If All Elements Are Not Zero
  • __msa_bnz_vExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If Not Zero (At Least One Element of Any Format Is Not Zero)
  • __msa_bnz_wExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If All Elements Are Not Zero
  • __msa_bsel_vExperimental(MIPS or MIPS-64) and msa
    Vector Bit Select
  • __msa_bseli_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Select
  • __msa_bset_bExperimental(MIPS or MIPS-64) and msa
    Vector Bit Set
  • __msa_bset_dExperimental(MIPS or MIPS-64) and msa
    Vector Bit Set
  • __msa_bset_hExperimental(MIPS or MIPS-64) and msa
    Vector Bit Set
  • __msa_bset_wExperimental(MIPS or MIPS-64) and msa
    Vector Bit Set
  • __msa_bseti_bExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Set
  • __msa_bseti_dExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Set
  • __msa_bseti_hExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Set
  • __msa_bseti_wExperimental(MIPS or MIPS-64) and msa
    Immediate Bit Set
  • __msa_bz_bExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If At Least One Element Is Zero
  • __msa_bz_dExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If At Least One Element Is Zero
  • __msa_bz_hExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If At Least One Element Is Zero
  • __msa_bz_vExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If Zero (All Elements of Any Format Are Zero)
  • __msa_bz_wExperimental(MIPS or MIPS-64) and msa
    Immediate Branch If At Least One Element Is Zero
  • __msa_ceq_bExperimental(MIPS or MIPS-64) and msa
    Vector Compare Equal
  • __msa_ceq_dExperimental(MIPS or MIPS-64) and msa
    Vector Compare Equal
  • __msa_ceq_hExperimental(MIPS or MIPS-64) and msa
    Vector Compare Equal
  • __msa_ceq_wExperimental(MIPS or MIPS-64) and msa
    Vector Compare Equal
  • __msa_ceqi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Equal
  • __msa_ceqi_dExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Equal
  • __msa_ceqi_hExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Equal
  • __msa_ceqi_wExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Equal
  • __msa_cfcmsaExperimental(MIPS or MIPS-64) and msa
    GPR Copy from MSA Control Register
  • __msa_cle_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than or Equal
  • __msa_cle_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than or Equal
  • __msa_cle_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than or Equal
  • __msa_cle_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than or Equal
  • __msa_cle_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than or Equal
  • __msa_cle_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than or Equal
  • __msa_cle_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than or Equal
  • __msa_cle_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than or Equal
  • __msa_clei_s_bExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than or Equal
  • __msa_clei_s_dExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than or Equal
  • __msa_clei_s_hExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than or Equal
  • __msa_clei_s_wExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than or Equal
  • __msa_clei_u_bExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than or Equal
  • __msa_clei_u_dExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than or Equal
  • __msa_clei_u_hExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than or Equal
  • __msa_clei_u_wExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than or Equal
  • __msa_clt_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than
  • __msa_clt_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than
  • __msa_clt_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than
  • __msa_clt_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Compare Signed Less Than
  • __msa_clt_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than
  • __msa_clt_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than
  • __msa_clt_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than
  • __msa_clt_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Compare Unsigned Less Than
  • __msa_clti_s_bExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than
  • __msa_clti_s_dExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than
  • __msa_clti_s_hExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than
  • __msa_clti_s_wExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Signed Less Than
  • __msa_clti_u_bExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than
  • __msa_clti_u_dExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than
  • __msa_clti_u_hExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than
  • __msa_clti_u_wExperimental(MIPS or MIPS-64) and msa
    Immediate Compare Unsigned Less Than
  • __msa_copy_s_bExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Signed
  • __msa_copy_s_dExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Signed
  • __msa_copy_s_hExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Signed
  • __msa_copy_s_wExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Signed
  • __msa_copy_u_bExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Unsigned
  • __msa_copy_u_dExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Unsigned
  • __msa_copy_u_hExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Unsigned
  • __msa_copy_u_wExperimental(MIPS or MIPS-64) and msa
    Element Copy to GPR Unsigned
  • __msa_ctcmsaExperimental(MIPS or MIPS-64) and msa
    GPR Copy to MSA Control Register
  • __msa_div_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Divide
  • __msa_div_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Divide
  • __msa_div_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Divide
  • __msa_div_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Divide
  • __msa_div_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Divide
  • __msa_div_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Divide
  • __msa_div_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Divide
  • __msa_div_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Divide
  • __msa_dotp_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product
  • __msa_dotp_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product
  • __msa_dotp_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product
  • __msa_dotp_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product
  • __msa_dotp_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product
  • __msa_dotp_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product
  • __msa_dpadd_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product and Add
  • __msa_dpadd_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product and Add
  • __msa_dpadd_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product and Add
  • __msa_dpadd_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product and Add
  • __msa_dpadd_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product and Add
  • __msa_dpadd_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product and Add
  • __msa_dpsub_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product and Add
  • __msa_dpsub_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product and Add
  • __msa_dpsub_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Dot Product and Add
  • __msa_dpsub_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product and Add
  • __msa_dpsub_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product and Add
  • __msa_dpsub_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Dot Product and Add
  • __msa_fadd_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Addition
  • __msa_fadd_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Addition
  • __msa_fcaf_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Always False
  • __msa_fcaf_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Always False
  • __msa_fceq_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Equal
  • __msa_fceq_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Equal
  • __msa_fclass_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Class Mask
  • __msa_fclass_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Class Mask
  • __msa_fcle_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Less or Equal
  • __msa_fcle_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Less or Equal
  • __msa_fclt_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Less Than
  • __msa_fclt_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Less Than
  • __msa_fcne_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Not Equal
  • __msa_fcne_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Not Equal
  • __msa_fcor_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Ordered
  • __msa_fcor_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Ordered
  • __msa_fcueq_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Equal
  • __msa_fcueq_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Equal
  • __msa_fcule_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Less or Equal
  • __msa_fcule_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Less or Equal
  • __msa_fcult_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Less Than
  • __msa_fcult_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Less Than
  • __msa_fcun_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered
  • __msa_fcun_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered
  • __msa_fcune_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Not Equal
  • __msa_fcune_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Quiet Compare Unordered or Not Equal
  • __msa_fdiv_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Division
  • __msa_fdiv_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Division
  • __msa_fexdo_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Down-Convert Interchange Format
  • __msa_fexp2_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Down-Convert Interchange Format
  • __msa_fexp2_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Down-Convert Interchange Format
  • __msa_fexupl_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Up-Convert Interchange Format Left
  • __msa_fexupr_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Up-Convert Interchange Format Left
  • __msa_ffint_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Round and Convert from Signed Integer
  • __msa_ffint_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Round and Convert from Signed Integer
  • __msa_ffint_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Round and Convert from Unsigned Integer
  • __msa_ffint_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Round and Convert from Unsigned Integer
  • __msa_ffql_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert from Fixed-Point Left
  • __msa_ffql_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert from Fixed-Point Left
  • __msa_ffqr_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert from Fixed-Point Left
  • __msa_ffqr_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert from Fixed-Point Left
  • __msa_fill_bExperimental(MIPS or MIPS-64) and msa
    Vector Fill from GPR
  • __msa_fill_dExperimental(MIPS or MIPS-64) and msa
    Vector Fill from GPR
  • __msa_fill_hExperimental(MIPS or MIPS-64) and msa
    Vector Fill from GPR
  • __msa_fill_wExperimental(MIPS or MIPS-64) and msa
    Vector Fill from GPR
  • __msa_flog2_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Base 2 Logarithm
  • __msa_flog2_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Base 2 Logarithm
  • __msa_fmadd_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Multiply-Add
  • __msa_fmadd_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Multiply-Add
  • __msa_fmax_a_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Maximum Based on Absolute Values
  • __msa_fmax_a_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Maximum Based on Absolute Values
  • __msa_fmax_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Maximum
  • __msa_fmax_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Maximum
  • __msa_fmin_a_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Minimum Based on Absolute Values
  • __msa_fmin_a_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Minimum Based on Absolute Values
  • __msa_fmin_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Minimum
  • __msa_fmin_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Minimum
  • __msa_fmsub_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Multiply-Sub
  • __msa_fmsub_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Multiply-Sub
  • __msa_fmul_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Multiplication
  • __msa_fmul_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Multiplication
  • __msa_frcp_dExperimental(MIPS or MIPS-64) and msa
    Vector Approximate Floating-Point Reciprocal
  • __msa_frcp_wExperimental(MIPS or MIPS-64) and msa
    Vector Approximate Floating-Point Reciprocal
  • __msa_frint_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Round to Integer
  • __msa_frint_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Round to Integer
  • __msa_frsqrt_dExperimental(MIPS or MIPS-64) and msa
    Vector Approximate Floating-Point Reciprocal of Square Root
  • __msa_frsqrt_wExperimental(MIPS or MIPS-64) and msa
    Vector Approximate Floating-Point Reciprocal of Square Root
  • __msa_fsaf_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Always False
  • __msa_fsaf_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Always False
  • __msa_fseq_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Equal
  • __msa_fseq_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Equal
  • __msa_fsle_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Less or Equal
  • __msa_fsle_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Less or Equal
  • __msa_fslt_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Less Than
  • __msa_fslt_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Less Than
  • __msa_fsne_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Not Equal
  • __msa_fsne_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Not Equal
  • __msa_fsor_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Ordered
  • __msa_fsor_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Ordered
  • __msa_fsqrt_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Square Root
  • __msa_fsqrt_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Square Root
  • __msa_fsub_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Subtraction
  • __msa_fsub_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Subtraction
  • __msa_fsueq_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Ordered
  • __msa_fsueq_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Ordered
  • __msa_fsule_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered or Less or Equal
  • __msa_fsule_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered or Less or Equal
  • __msa_fsult_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered or Less Than
  • __msa_fsult_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered or Less Than
  • __msa_fsun_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered
  • __msa_fsun_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered
  • __msa_fsune_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered or Not Equal
  • __msa_fsune_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Signaling Compare Unordered or Not Equal
  • __msa_ftint_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert to Signed Integer
  • __msa_ftint_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert to Signed Integer
  • __msa_ftint_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert to Unsigned Integer
  • __msa_ftint_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert to Unsigned Integer
  • __msa_ftq_hExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert to Fixed-Point
  • __msa_ftq_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Convert to Fixed-Point
  • __msa_ftrunc_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Truncate and Convert to Signed Integer
  • __msa_ftrunc_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Truncate and Convert to Signed Integer
  • __msa_ftrunc_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Truncate and Convert to Unsigned Integer
  • __msa_ftrunc_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Floating-Point Truncate and Convert to Unsigned Integer
  • __msa_hadd_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Horizontal Add
  • __msa_hadd_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Horizontal Add
  • __msa_hadd_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Horizontal Add
  • __msa_hadd_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Horizontal Add
  • __msa_hadd_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Horizontal Add
  • __msa_hadd_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Horizontal Add
  • __msa_hsub_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Horizontal Subtract
  • __msa_hsub_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Horizontal Subtract
  • __msa_hsub_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Horizontal Subtract
  • __msa_hsub_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Horizontal Subtract
  • __msa_hsub_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Horizontal Subtract
  • __msa_hsub_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Horizontal Subtract
  • __msa_ilvev_bExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Even
  • __msa_ilvev_dExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Even
  • __msa_ilvev_hExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Even
  • __msa_ilvev_wExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Even
  • __msa_ilvl_bExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Left
  • __msa_ilvl_dExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Left
  • __msa_ilvl_hExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Left
  • __msa_ilvl_wExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Left
  • __msa_ilvod_bExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Odd
  • __msa_ilvod_dExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Odd
  • __msa_ilvod_hExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Odd
  • __msa_ilvod_wExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Odd
  • __msa_ilvr_bExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Right
  • __msa_ilvr_dExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Right
  • __msa_ilvr_hExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Right
  • __msa_ilvr_wExperimental(MIPS or MIPS-64) and msa
    Vector Interleave Right
  • __msa_insert_bExperimental(MIPS or MIPS-64) and msa
    GPR Insert Element
  • __msa_insert_dExperimental(MIPS or MIPS-64) and msa
    GPR Insert Element
  • __msa_insert_hExperimental(MIPS or MIPS-64) and msa
    GPR Insert Element
  • __msa_insert_wExperimental(MIPS or MIPS-64) and msa
    GPR Insert Element
  • __msa_insve_bExperimental(MIPS or MIPS-64) and msa
    Element Insert Element
  • __msa_insve_dExperimental(MIPS or MIPS-64) and msa
    Element Insert Element
  • __msa_insve_hExperimental(MIPS or MIPS-64) and msa
    Element Insert Element
  • __msa_insve_wExperimental(MIPS or MIPS-64) and msa
    Element Insert Element
  • __msa_ld_bExperimental(MIPS or MIPS-64) and msa
    Vector Load
  • __msa_ld_dExperimental(MIPS or MIPS-64) and msa
    Vector Load
  • __msa_ld_hExperimental(MIPS or MIPS-64) and msa
    Vector Load
  • __msa_ld_wExperimental(MIPS or MIPS-64) and msa
    Vector Load
  • __msa_ldi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Load
  • __msa_ldi_dExperimental(MIPS or MIPS-64) and msa
    Immediate Load
  • __msa_ldi_hExperimental(MIPS or MIPS-64) and msa
    Immediate Load
  • __msa_ldi_wExperimental(MIPS or MIPS-64) and msa
    Immediate Load
  • __msa_madd_q_hExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Add
  • __msa_madd_q_wExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Add
  • __msa_maddr_q_hExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Add Rounded
  • __msa_maddr_q_wExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Add Rounded
  • __msa_maddv_bExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Add
  • __msa_maddv_dExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Add
  • __msa_maddv_hExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Add
  • __msa_maddv_wExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Add
  • __msa_max_a_bExperimental(MIPS or MIPS-64) and msa
    Vector Maximum Based on Absolute Values
  • __msa_max_a_dExperimental(MIPS or MIPS-64) and msa
    Vector Maximum Based on Absolute Values
  • __msa_max_a_hExperimental(MIPS or MIPS-64) and msa
    Vector Maximum Based on Absolute Values
  • __msa_max_a_wExperimental(MIPS or MIPS-64) and msa
    Vector Maximum Based on Absolute Values
  • __msa_max_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Maximum
  • __msa_max_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Maximum
  • __msa_max_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Maximum
  • __msa_max_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Maximum
  • __msa_max_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Maximum
  • __msa_max_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Maximum
  • __msa_max_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Maximum
  • __msa_max_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Maximum
  • __msa_maxi_s_bExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Maximum
  • __msa_maxi_s_dExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Maximum
  • __msa_maxi_s_hExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Maximum
  • __msa_maxi_s_wExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Maximum
  • __msa_maxi_u_bExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Maximum
  • __msa_maxi_u_dExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Maximum
  • __msa_maxi_u_hExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Maximum
  • __msa_maxi_u_wExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Maximum
  • __msa_min_a_bExperimental(MIPS or MIPS-64) and msa
    Vector Minimum Based on Absolute Value
  • __msa_min_a_dExperimental(MIPS or MIPS-64) and msa
    Vector Minimum Based on Absolute Value
  • __msa_min_a_hExperimental(MIPS or MIPS-64) and msa
    Vector Minimum Based on Absolute Value
  • __msa_min_a_wExperimental(MIPS or MIPS-64) and msa
    Vector Minimum Based on Absolute Value
  • __msa_min_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Minimum
  • __msa_min_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Minimum
  • __msa_min_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Minimum
  • __msa_min_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Minimum
  • __msa_min_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Minimum
  • __msa_min_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Minimum
  • __msa_min_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Minimum
  • __msa_min_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Minimum
  • __msa_mini_s_bExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Minimum
  • __msa_mini_s_dExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Minimum
  • __msa_mini_s_hExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Minimum
  • __msa_mini_s_wExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Minimum
  • __msa_mini_u_bExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Minimum
  • __msa_mini_u_dExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Minimum
  • __msa_mini_u_hExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Minimum
  • __msa_mini_u_wExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Minimum
  • __msa_mod_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Modulo
  • __msa_mod_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Modulo
  • __msa_mod_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Modulo
  • __msa_mod_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Modulo
  • __msa_mod_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Modulo
  • __msa_mod_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Modulo
  • __msa_mod_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Modulo
  • __msa_mod_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Modulo
  • __msa_move_vExperimental(MIPS or MIPS-64) and msa
    Vector Move
  • __msa_msub_q_hExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Subtract
  • __msa_msub_q_wExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Subtract
  • __msa_msubr_q_hExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Subtract Rounded
  • __msa_msubr_q_wExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply and Subtract Rounded
  • __msa_msubv_bExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Subtract
  • __msa_msubv_dExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Subtract
  • __msa_msubv_hExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Subtract
  • __msa_msubv_wExperimental(MIPS or MIPS-64) and msa
    Vector Multiply and Subtract
  • __msa_mul_q_hExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply
  • __msa_mul_q_wExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply
  • __msa_mulr_q_hExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply Rounded
  • __msa_mulr_q_wExperimental(MIPS or MIPS-64) and msa
    Vector Fixed-Point Multiply Rounded
  • __msa_mulv_bExperimental(MIPS or MIPS-64) and msa
    Vector Multiply
  • __msa_mulv_dExperimental(MIPS or MIPS-64) and msa
    Vector Multiply
  • __msa_mulv_hExperimental(MIPS or MIPS-64) and msa
    Vector Multiply
  • __msa_mulv_wExperimental(MIPS or MIPS-64) and msa
    Vector Multiply
  • __msa_nloc_bExperimental(MIPS or MIPS-64) and msa
    Vector Leading Ones Count
  • __msa_nloc_dExperimental(MIPS or MIPS-64) and msa
    Vector Leading Ones Count
  • __msa_nloc_hExperimental(MIPS or MIPS-64) and msa
    Vector Leading Ones Count
  • __msa_nloc_wExperimental(MIPS or MIPS-64) and msa
    Vector Leading Ones Count
  • __msa_nlzc_bExperimental(MIPS or MIPS-64) and msa
    Vector Leading Zeros Count
  • __msa_nlzc_dExperimental(MIPS or MIPS-64) and msa
    Vector Leading Zeros Count
  • __msa_nlzc_hExperimental(MIPS or MIPS-64) and msa
    Vector Leading Zeros Count
  • __msa_nlzc_wExperimental(MIPS or MIPS-64) and msa
    Vector Leading Zeros Count
  • __msa_nor_vExperimental(MIPS or MIPS-64) and msa
    Vector Logical Negated Or
  • __msa_nori_bExperimental(MIPS or MIPS-64) and msa
    Immediate Logical Negated Or
  • __msa_or_vExperimental(MIPS or MIPS-64) and msa
    Vector Logical Or
  • __msa_ori_bExperimental(MIPS or MIPS-64) and msa
    Immediate Logical Or
  • __msa_pckev_bExperimental(MIPS or MIPS-64) and msa
    Vector Pack Even
  • __msa_pckev_dExperimental(MIPS or MIPS-64) and msa
    Vector Pack Even
  • __msa_pckev_hExperimental(MIPS or MIPS-64) and msa
    Vector Pack Even
  • __msa_pckev_wExperimental(MIPS or MIPS-64) and msa
    Vector Pack Even
  • __msa_pckod_bExperimental(MIPS or MIPS-64) and msa
    Vector Pack Odd
  • __msa_pckod_dExperimental(MIPS or MIPS-64) and msa
    Vector Pack Odd
  • __msa_pckod_hExperimental(MIPS or MIPS-64) and msa
    Vector Pack Odd
  • __msa_pckod_wExperimental(MIPS or MIPS-64) and msa
    Vector Pack Odd
  • __msa_pcnt_bExperimental(MIPS or MIPS-64) and msa
    Vector Population Count
  • __msa_pcnt_dExperimental(MIPS or MIPS-64) and msa
    Vector Population Count
  • __msa_pcnt_hExperimental(MIPS or MIPS-64) and msa
    Vector Population Count
  • __msa_pcnt_wExperimental(MIPS or MIPS-64) and msa
    Vector Population Count
  • __msa_sat_s_bExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Saturate
  • __msa_sat_s_dExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Saturate
  • __msa_sat_s_hExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Saturate
  • __msa_sat_s_wExperimental(MIPS or MIPS-64) and msa
    Immediate Signed Saturate
  • __msa_sat_u_bExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Saturate
  • __msa_sat_u_dExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Saturate
  • __msa_sat_u_hExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Saturate
  • __msa_sat_u_wExperimental(MIPS or MIPS-64) and msa
    Immediate Unsigned Saturate
  • __msa_shf_bExperimental(MIPS or MIPS-64) and msa
    Immediate Set Shuffle Elements
  • __msa_shf_hExperimental(MIPS or MIPS-64) and msa
    Immediate Set Shuffle Elements
  • __msa_shf_wExperimental(MIPS or MIPS-64) and msa
    Immediate Set Shuffle Elements
  • __msa_sld_bExperimental(MIPS or MIPS-64) and msa
    GPR Columns Slide
  • __msa_sld_dExperimental(MIPS or MIPS-64) and msa
    GPR Columns Slide
  • __msa_sld_hExperimental(MIPS or MIPS-64) and msa
    GPR Columns Slide
  • __msa_sld_wExperimental(MIPS or MIPS-64) and msa
    GPR Columns Slide
  • __msa_sldi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Columns Slide
  • __msa_sldi_dExperimental(MIPS or MIPS-64) and msa
    Immediate Columns Slide
  • __msa_sldi_hExperimental(MIPS or MIPS-64) and msa
    Immediate Columns Slide
  • __msa_sldi_wExperimental(MIPS or MIPS-64) and msa
    Immediate Columns Slide
  • __msa_sll_bExperimental(MIPS or MIPS-64) and msa
    Vector Shift Left
  • __msa_sll_dExperimental(MIPS or MIPS-64) and msa
    Vector Shift Left
  • __msa_sll_hExperimental(MIPS or MIPS-64) and msa
    Vector Shift Left
  • __msa_sll_wExperimental(MIPS or MIPS-64) and msa
    Vector Shift Left
  • __msa_slli_bExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Left
  • __msa_slli_dExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Left
  • __msa_slli_hExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Left
  • __msa_slli_wExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Left
  • __msa_splat_bExperimental(MIPS or MIPS-64) and msa
    GPR Element Splat
  • __msa_splat_dExperimental(MIPS or MIPS-64) and msa
    GPR Element Splat
  • __msa_splat_hExperimental(MIPS or MIPS-64) and msa
    GPR Element Splat
  • __msa_splat_wExperimental(MIPS or MIPS-64) and msa
    GPR Element Splat
  • __msa_splati_bExperimental(MIPS or MIPS-64) and msa
    Immediate Element Splat
  • __msa_splati_dExperimental(MIPS or MIPS-64) and msa
    Immediate Element Splat
  • __msa_splati_hExperimental(MIPS or MIPS-64) and msa
    Immediate Element Splat
  • __msa_splati_wExperimental(MIPS or MIPS-64) and msa
    Immediate Element Splat
  • __msa_sra_bExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic
  • __msa_sra_dExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic
  • __msa_sra_hExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic
  • __msa_sra_wExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic
  • __msa_srai_bExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic
  • __msa_srai_dExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic
  • __msa_srai_hExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic
  • __msa_srai_wExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic
  • __msa_srar_bExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic Rounded
  • __msa_srar_dExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic Rounded
  • __msa_srar_hExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic Rounded
  • __msa_srar_wExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Arithmetic Rounded
  • __msa_srari_bExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic Rounded
  • __msa_srari_dExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic Rounded
  • __msa_srari_hExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic Rounded
  • __msa_srari_wExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Arithmetic Rounded
  • __msa_srl_bExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical
  • __msa_srl_dExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical
  • __msa_srl_hExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical
  • __msa_srl_wExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical
  • __msa_srli_bExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical
  • __msa_srli_dExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical
  • __msa_srli_hExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical
  • __msa_srli_wExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical
  • __msa_srlr_bExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical Rounded
  • __msa_srlr_dExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical Rounded
  • __msa_srlr_hExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical Rounded
  • __msa_srlr_wExperimental(MIPS or MIPS-64) and msa
    Vector Shift Right Logical Rounded
  • __msa_srlri_bExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical Rounded
  • __msa_srlri_dExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical Rounded
  • __msa_srlri_hExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical Rounded
  • __msa_srlri_wExperimental(MIPS or MIPS-64) and msa
    Immediate Shift Right Logical Rounded
  • __msa_st_bExperimental(MIPS or MIPS-64) and msa
    Vector Store
  • __msa_st_dExperimental(MIPS or MIPS-64) and msa
    Vector Store
  • __msa_st_hExperimental(MIPS or MIPS-64) and msa
    Vector Store
  • __msa_st_wExperimental(MIPS or MIPS-64) and msa
    Vector Store
  • __msa_subs_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Signed Values
  • __msa_subs_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Signed Values
  • __msa_subs_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Signed Values
  • __msa_subs_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Signed Values
  • __msa_subs_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Unsigned Values
  • __msa_subs_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Unsigned Values
  • __msa_subs_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Unsigned Values
  • __msa_subs_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Unsigned Values
  • __msa_subsus_u_bExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Signed from Unsigned
  • __msa_subsus_u_dExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Signed from Unsigned
  • __msa_subsus_u_hExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Signed from Unsigned
  • __msa_subsus_u_wExperimental(MIPS or MIPS-64) and msa
    Vector Unsigned Saturated Subtract of Signed from Unsigned
  • __msa_subsuu_s_bExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Unsigned Values
  • __msa_subsuu_s_dExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Unsigned Values
  • __msa_subsuu_s_hExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Unsigned Values
  • __msa_subsuu_s_wExperimental(MIPS or MIPS-64) and msa
    Vector Signed Saturated Subtract of Unsigned Values
  • __msa_subv_bExperimental(MIPS or MIPS-64) and msa
    Vector Subtract
  • __msa_subv_dExperimental(MIPS or MIPS-64) and msa
    Vector Subtract
  • __msa_subv_hExperimental(MIPS or MIPS-64) and msa
    Vector Subtract
  • __msa_subv_wExperimental(MIPS or MIPS-64) and msa
    Vector Subtract
  • __msa_subvi_bExperimental(MIPS or MIPS-64) and msa
    Immediate Subtract
  • __msa_subvi_dExperimental(MIPS or MIPS-64) and msa
    Immediate Subtract
  • __msa_subvi_hExperimental(MIPS or MIPS-64) and msa
    Immediate Subtract
  • __msa_subvi_wExperimental(MIPS or MIPS-64) and msa
    Immediate Subtract
  • __msa_vshf_bExperimental(MIPS or MIPS-64) and msa
    Vector Data Preserving Shuffle
  • __msa_vshf_dExperimental(MIPS or MIPS-64) and msa
    Vector Data Preserving Shuffle
  • __msa_vshf_hExperimental(MIPS or MIPS-64) and msa
    Vector Data Preserving Shuffle
  • __msa_vshf_wExperimental(MIPS or MIPS-64) and msa
    Vector Data Preserving Shuffle
  • __msa_xor_vExperimental(MIPS or MIPS-64) and msa
    Vector Logical Exclusive Or
  • __msa_xori_bExperimental(MIPS or MIPS-64) and msa
    Immediate Logical Exclusive Or
  • break_ExperimentalMIPS or MIPS-64
    Generates the trap instruction BREAK